MC56F8346VFVER2 Freescale Semiconductor, MC56F8346VFVER2 Datasheet - Page 102

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MC56F8346VFVER2

Manufacturer Part Number
MC56F8346VFVER2
Description
IC HYBRID CTRLR 16BIT 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8346VFVER2

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
5.6.11
5.6.11.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.11.2
The contents of this register determine the location of the Vector Address Table. The value in this register
is used as the upper 13 bits of the interrupt Vector Address Bus (VAB[20:0]). The lower eight bits are
determined based upon the highest-priority interrupt. They are then appended onto VBA before presenting
the full VAB to the 56800E core; see
5.6.12
5.6.12.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.12.2
This value determines which IRQ will be a Fast Interrupt 0. Fast interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first; see
occur if a fast interrupt vector is set to any other priority. Fast interrupts automatically become the
highest-priority level 2 interrupt, regardless of their location in the interrupt table, prior to being declared
as fast interrupt. Fast Interrupt 0 has priority over Fast Interrupt 1. To determine the vector number of each
IRQ, refer to
102
Base + $A
Base + $B
RESET
RESET
Write
Write
Read
Read
Part
Vector Base Address Register (VBA)
Fast Interrupt 0 Match Register (FIM0)
Reserved—Bits 15–13
Interrupt Vector Base Address (VECTOR BASE ADDRESS)—Bits 12–0
Reserved—Bits 15–7
Fast Interrupt 0 Vector Number (FAST INTERRUPT 0)—Bits 6–0
Table
5.3.3. IRQs used as fast interrupts must be set to priority level 2. Unexpected results will
15
15
0
0
0
0
4-5.
Figure 5-14 Fast Interrupt 0 Match Register (FIM0)
Figure 5-13 Vector Base Address Register (VBA)
14
14
0
0
0
0
13
13
0
0
0
0
12
12
0
0
0
Part 5.3.1
56F8346 Technical Data, Rev. 15
11
11
0
0
0
10
10
0
0
0
for details.
9
0
9
0
0
8
0
8
0
0
VECTOR BASE ADDRESS
7
7
0
0
0
6
6
0
0
5
0
5
0
FAST INTERRUPT 0
4
4
0
0
3
3
0
0
Freescale Semiconductor
2
0
2
0
1
0
1
0
Preliminary
0
0
0
0

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