MC56F8346VFVER2 Freescale Semiconductor, MC56F8346VFVER2 Datasheet - Page 36

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MC56F8346VFVER2

Manufacturer Part Number
MC56F8346VFVER2
Description
IC HYBRID CTRLR 16BIT 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8346VFVER2

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
36
Signal Name
(GPIOD10)
(GPIOD11)
(GPIOD12)
FAULTB0
FAULTB1
FAULTB2
FAULTB3
V
V
V
V
V
ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7
REFMID
ISB0
ISB1
ISB2
REFLO
REFH
REFP
REFN
Table 2-2 Signal and Package Information for the 144 Pin LQFP
Pin No.
101
100
50
52
53
56
57
58
61
88
89
90
91
92
93
94
95
99
98
97
Schmitt
Schmitt
Schmitt
Output
Output
Input/
Input/
Type
Input
Input
Input
Input
Input
Input
enabled
enabled
During
Analog
Analog
Analog
Analog
Analog
pull-up
pull-up
Output
56F8346 Technical Data, Rev. 15
Reset
Input,
Input,
Input/
State
Input
Input
Input
Input
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
Port D GPIO — These three GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to ISB functionality.
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOD_PUR register. For details, see
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMB bit in the
SIM_PUDR register. For details, see
ANA0 - 3 — Analog inputs to ADC A, channel 0
ANA4 - 7 — Analog inputs to ADC A, channel 1
V
than or equal to V
V
which are brought off-chip so they can be bypassed. Connect to a
0.1μF low ESR capacitor.
V
be connected to a low-noise V
REFH
REFP
REFLO
, V
— Analog Reference Voltage High. V
— Analog Reference Voltage Low. This should normally
REFMID
& V
DDA_ADC.
REFN
Signal Description
— Internal pins for voltage reference
SSA
.
Part
6.5.8.
Freescale Semiconductor
REFH
Part
must be less
6.5.8.
Preliminary

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