MC56F8346VFVER2 Freescale Semiconductor, MC56F8346VFVER2 Datasheet - Page 147

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MC56F8346VFVER2

Manufacturer Part Number
MC56F8346VFVER2
Description
IC HYBRID CTRLR 16BIT 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8346VFVER2

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
10.7 Crystal Oscillator Timing
10.8 External Memory Interface Timing
The External Memory Interface is designed to access static memory and peripheral devices.
shows sample timing and parameters that are detailed in
The timing of each parameter consists of both a fixed delay portion and a clock related portion, as well as
user controlled wait states. The equation:
When using the XTAL clock input directly as the chip clock without prescaling (ZSRC selects prescaler
clock and prescaler is set to
clock input. In this situation only, parameter values must be adjusted for the duty cycle at XTAL. DCAOE
Freescale Semiconductor
Preliminary
3. This is the minimum time required after the PLL set up is changed to ensure reliable operation.
should be used to determine the actual time of each parameter. The terms in this equation are defined as:
Crystal Start-up time
Resonator Start-up time
Crystal ESR
Crystal Peak-to-Peak Jitter
Crystal Min-Max Period Variation
Resonator Peak-to-Peak Jitter
Resonator Min-Max Period Variation
Bias Current, high-drive mode
Bias Current, low-drive mode
Quiescent Current, power-down mode
t
D
P
M
W
= Parameter delay time
= Fixed portion of the delay, due to on-chip path delays
= Period of the system clock, which determines the execution rate of the part
= Fixed portion of a clock period inherent in the design; this number is adjusted to account
= Sum of the applicable wait state controls. The “Wait State Controls” column of
t = D + P * (M + W)
(i.e., when the device is operating at 60MHz, P = 16.67 ns)
for possible derating of clock duty cycle
Table 10-16
56F8300 Peripheral User Manual details what each wait state field controls.
Characteristic
Table 10-15 Crystal Oscillator Parameters
shows the applicable controls for each parameter and the EMI chapter of the
÷ 1),
the EMI quadrature clock is generated using both edges of the EXTAL
56F8346 Technical Data, Rev. 15
Symbol
I
I
R
BIASH
BIASL
T
T
T
T
T
I
T
ESR
PD
CS
RS
PV
RP
RJ
D
Table
0.12
Min
0.1
70
4
10-16.
0.18
Typ
250
80
5
0
Max
120
250
300
300
290
110
1.5
10
1
1
Crystal Oscillator Timing
ohms
Unit
Figure 10-4
ms
ms
μA
μA
μA
ps
ns
ps
ps
147

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