MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 129

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Technical Data — MC68HC912D60A
10.1 Contents
10.2 Introduction
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
10.2
10.3
10.4
The 112QFP MC68HC912D60A offers 16 additional I/O port pins with
key wake-up capability on 15 of them (KWG7 is used for I
detect). Only two (KWG4 and KWH4) are available on the 80QFP
package. All Port G and Port H pins should either be defined as outputs
or have their pull-ups/downs enabled.
The key wake-up feature of the MC68HC912D60A issues an interrupt
that will wake up the CPU when it is in the STOP or WAIT mode. Two
ports are associated with the key wake-up function: port G and port H.
Port G and port H wake-ups are triggered with a falling signal edge. For
each pin which has an interrupt enabled, there is a path to the interrupt
request signal which has no clocked devices when the part is in stop
mode. This allows an active edge to bring the part out of stop.
Digital filtering is included to prevent pulses shorter than a specified
value from waking the part from STOP.
An interrupt is generated when a bit in the KWIFG or KWIFH register and
its corresponding KWIEG or KWIEH bit are both set. All 15 bits/pins
share the same interrupt vector. Key wake-ups can be used with the pins
configured as inputs or outputs.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Key Wake-Up Input Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Key Wake-up and Port Registers . . . . . . . . . . . . . . . . . . . . . . 130
Section 10. I/O Ports with Key Wake-up
I/O Ports with Key Wake-up
2
C start
Technical Data
129