MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 279

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.5.3 SS Output
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
SCK (CPOL=0)
SCK (CPOL=1)
SAMPLE I
(MOSI/MISO)
CHANGE O
CHANGE O
SEL SS (O)
(Master only)
SEL SS (I)
(MOSI pin)
(MISO pin)
MSB first (LSBF=0):
LSB first (LSBF=1):
Transfer
t
L
Available in master mode only, SS output is enabled with the SSOE bit
in the SP0CR1 register if the corresponding DDRS is set. The SS output
pin will be connected to the SS input pin of the external slave device. The
SS output automatically goes low for each transmission to select the
external device and it goes high during each idling state to deselect
external devices.
Figure 15-5. SPI Clock Format 1 (CPHA = 1)
MSB
LSB
DDS7
Begin
Bit 6
Bit 1
0
0
1
1
Multiple Serial Interface
Bit 5
Bit 2
SSOE
Table 15-3. SS Output Selection
0
1
0
1
Bit 4
Bit 3
SS Input with MODF Feature
General-Purpose Output
Bit 3
Bit 4
Master Mode
SS Output
Reserved
Bit 2
Bit 5
Bit 1
Bit 6
End
Serial Peripheral Interface (SPI)
MSB
LSB
Multiple Serial Interface
t
T
Slave Mode
Minimum 1/2 SCK
SS Input
SS Input
SS Input
SS Input
t
I
for t
T
Technical Data
t
, t
L
l
, t
L
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