HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 264

• Manufacturer Part Number: HD6417708RF100A
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708RF100A

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3.15 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Wait State Control: As the clock frequency increases, it becomes impossible to complete all
states in one cycle as in basic access. Therefore, provision is made for state extension by using the
setting bits in WCR2, MCR, and DCR. The timing with state extension using these settings is
shown in figure 10.16. Up to four additional Tpc cycles (cycles used to secure the RAS precharge
time) can be inserted by means of the TPC bits in MCR and DCR. However, if there is a DRAM
access request immediately after an auto-refresh (CAS-before-RAS refresh), the interval until the
next assertion of RAS is 2 cycles, regardless of the values in MCR and DCR. The number of
cycles from RAS assertion to CAS assertion can be set to between 1 and 4 by inserting Trw cycles
by means of the RCD bits in MCR and DCR. The number of cycles from CAS assertion to the end
of the access can be varied between 1 and 3 according to the setting of A1–2W (1,0) or A3W (1,0)
in WCR2.
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