HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 386

• Manufacturer Part Number: HD6417708RF100A
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708RF100A

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3.15 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

13.3.2
In asynchronous mode, each transmitted or received character begins with a start bit and ends with
a stop bit. Serial communication is synchronized one character at a time.
The transmitting and receiving sections of the SCI are independent, so full-duplex communication
is possible. The transmitter and receiver are both double-buffered, so data can be written and read
while transmitting and receiving are in progress, enabling continuous transmitting and receiving.
Figure 13.2 shows the general format of asynchronous serial communication. In asynchronous
serial communication, the communication line is normally held in the mark (high) state. The SCI
monitors the line and starts serial communication when the line goes to the space (low) state,
indicating a start bit. One serial character consists of a start bit (low), data (LSB first), parity bit
(high or low), and stop bit (high), in that order.
When receiving in asynchronous mode, the SCI synchronizes on the falling edge of the start bit.
The SCI samples each data bit on the eighth pulse of a clock with a frequency 16 times the bit rate.
Receive data is latched at the center of each bit.
Transmit/Receive Formats: Table 13.11 lists the 12 communication formats that can be selected
in asynchronous mode. The format is selected by settings in the serial mode register (SCSMR).
366
Figure 13.2 Data Format in Asynchronous Communication (Example: 8-Bit Data with
Serial
data
Operation in Asynchronous Mode
1
1 bit
Start
bit
0
(LSB)
D
One unit of communication data (character or frame)
0
D
1
Transmit/receive data
D
2
Parity and 2 Stop Bits)
7 or 8 bits
D
3
D
4
D
5
D
6
(MSB)
D
7
Parity
no bit
1 or
0/1
bit
Idle (mark) state
1
Stop
2 bits
1 or
bit
1
1