HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 273

IC SUPERH MPU ROMLESS 144LQFP

HD6417708RF100A

Manufacturer Part Number
HD6417708RF100A
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708RF100A

Core Processor
SH-2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3.15 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

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1. Normally, set the refresh counter count value to the optimum value for the L version (e.g. 1024
2. When a transition is made to self-refreshing:
This procedure causes refreshing immediately following a self-refresh to occur in a short cycle.
When adequate refreshing ends, an interrupt is generated and the setting can be restored to the
original refresh cycle.
CAS-before-RAS refreshing is performed in normal operation, in sleep mode, and in a manual
reset.
Self-refreshing is performed in normal operation, in sleep mode, in standby mode, and in a manual
reset.
When the bus has been released in response to a bus arbitration request, or when a transition is
made to standby mode, signals generally become high-impedance. Controlling the RAS and CAS
signals to become high-impedance or continue to be output is performed with the HIZCNT bit in
BCR1. This enables the DRAM to be kept in the self-refreshing state.
cycles/128 ms).
a. Provide an interrupt handler to restore the refresh counter count value to the optimum value
b. Reset the refresh counter count value to the requested short cycle (e.g. 1024 cycles/16 ms),
c. Set self-refresh mode.
for the L version (e.g. 1024 cycles/128 ms) when a refresh counter overflow interrupt is
generated.
set refresh controller overflow interruption, and clear the refresh count register (RFCR) to
0.
253

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