HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 284

IC SUPERH MPU ROMLESS 144LQFP

HD6417708RF100A

Manufacturer Part Number
HD6417708RF100A
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708RF100A

Core Processor
SH-2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3.15 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

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Single Write: The basic timing chart for write access is shown in figure 10.28. In a single write
operation, following the Tr cycle in which ACTV command output is performed, a WRITA
command that performs auto-precharge is issued in the Tc1 cycle. In the write cycle, the write data
is output at the same time as the write command. For the write with auto-precharge command,
precharging of the relevant bank is performed in synchronous DRAM after completion of the write
command, and therefore no command can be issued for the same bank until precharging is
completed. Consequently, in addition to the precharge wait cycle, Tpc, used in a read access, cycle
Trwl is also added as a wait interval until precharging is started following the write command.
Issuance of a new command for the same bank is postponed during this interval. The number of
Trwl cycles can be specified by the TRWL bit in MCR.
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