HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 611

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 23.22 Timing Conditions of On-Chip Supporting Modules
Conditions: V
Item
FRT
TMR
PWM
SCI
Ports
HIF read
cycle
HIF write
cycle
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock pulse width
Timer output delay time
Timer reset input setup time
Timer clock input setup time
Timer clock pulse width (single
edge)
Timer clock pulse width (both
edges)
Timer output delay time
Input clock cycle
Transmit data delay time (Sync)
Receive data setup time (Sync)
Receive data hold time (Sync)
Input clock pulse width
Output data delay time
Input data setup time
Input data hold time
CS/HA
CS/HA
IOR pulse width
HDB delay time
HDB hold time
HIRQ delay time
CS/HA
CS/HA
IOW pulse width
High-speed GATE A
High-speed GATE A
HDB hold time
GA
Ta = –20˚C to +75˚C (regular specifications), Ta = –40 C to +85 C (wide-range
specifications)
CC
20
delay time
= 3.0 V to 5.5 V, V
0
0
0
0
setup time
setup time
hold time
hold time
(Async)
(Sync)
20
20
not uesd
uesd
SS
= 0 V, ø = 2.0 MHz to maximum operating frequency,
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
FTOD
FTIS
FTCS
FTCWH
FTCWL
TMOD
TMRS
TMCS
TMCWH
TMCWL
PWOD
Scyc
TXD
RXS
RXH
SCKW
PWD
PRS
PRH
HAR
HRA
HRPW
HRD
HRF
HIRQ
HAW
HWA
HWPW
HDW
HWD
HGA
Min
—
80
80
1.5
—
80
80
1.5
2.5
—
4
6
—
150
150
0.4
—
80
80
10
10
220
—
0
—
10
10
100
50
85
25
—
Condition
10 MHz
Max
150
—
—
—
150
—
—
—
—
150
—
—
200
—
—
0.6
150
—
—
—
—
—
200
40
200
—
—
—
—
—
—
180
Unit
ns
ns
ns
t
ns
ns
ns
t
t
ns
t
t
ns
ns
ns
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
Scyc
Test Conditions
Fig. 23.13
Fig. 23.14
Fig. 23.15
Fig. 23.17
Fig. 23.16
Fig. 23.18
Fig. 23.19
Fig. 23.20
Fig. 23.21
Fig. 23.22
Fig. 23.23
581