HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 908
HD6417750RF240DV
Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417750RBP240DV.pdf
(1164 pages)
Specifications of HD6417750RF240DV
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Manufacturer:
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Section 18 I/O Ports
Bit 6—Serial Port RTS Port Data (RTSDT): Specifies the serial port RTS2 pin input/output
data. Input or output is specified by the RTSIO pin (see the description of bit 7, RTSIO, for
details). When the RTS2 pin is designated as an output, the value of the RTSDT bit is output to the
RTS2 pin. The RTS2 pin value is read from the RTSDT bit regardless of the value of the RTSIO
bit. The initial value of this bit after a power-on reset or manual reset is undefined.
Bit 6: RTSDT
0
1
Bit 5—Serial Port CTS Port I/O (CTSIO): Specifies serial port CTS2 pin input/output. When
the CTS2 pin is actually set as a port output pin and outputs the value set by the CTSDT bit, the
MCE bit in SCFCR2 should be cleared to 0.
Bit 5: CTSIO
0
1
Bit 4—Serial Port CTS Port Data (CTSDT): Specifies the serial port CTS2 pin input/output
data. Input or output is specified by the CTSIO pin (see the description of bit 5, CTSIO, for
details). When the CTS2 pin is designated as an output, the value of the CTSDT bit is output to the
CTS2 pin. The CTS2 pin value is read from the CTSDT bit regardless of the value of the CTSIO
bit. The initial value of this bit after a power-on reset or manual reset is undefined.
Bit 4: CTSDT
0
1
Bits 3 and 2—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 1—Serial Port Break I/O (SPB2IO): Specifies the serial port TxD2 pin output condition.
When the TxD2 pin is actually set as a port output pin and outputs the value set by the SPB2DT
bit, the TE bit in SCSCR2 should be cleared to 0.
Bit 1: SPB2IO
0
1
Rev.7.00 Oct. 10, 2008 Page 822 of 1074
REJ09B0366-0700
Description
Input/output data is low-level
Input/output data is high-level
Description
CTSDT bit value is not output to the CTS2 pin
CTSDT bit value is output to the CTS2 pin
Description
Input/output data is low-level
Input/output data is high-level
Description
SPB2DT bit value is not output to the TxD2 pin
SPB2DT bit value is output to the TxD2 pin
(Initial value)
(Initial value)
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