HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 641
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
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16.3.4
CMTIRQS, once set, can only be cleared by a write. Writing 0 to these bits clears the interrupt
status bits. These conditions only create an interrupt if the relevant interrupt enable bit is set.
Initial value:
Initial value:
Note:
Bit
31 to 12 —
11
10
9
8
7
6
5
4
3
2
1
0
R/W:
R/W:
Bit:
Bit:
* Writing 0 to clear the bit to 0 is allowed.
IRQ Status Register (CMTIRQS)
Bit Name
IO3
IO2
IO1
IO0
IC3
IC2
IC1
IC0
IE3
IE2
IE1
IE0
31
15
R
R
0
0
-
-
30
14
R
-
R
0
0
-
29
13
R
R
-
0
0
-
Initial Value
—
0
0
0
0
0
0
0
0
0
0
0
0
28
12
R
R
0
0
-
-
R/W
IO3
27
11
R
0
0
-
R/W
R/W
R
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
IO2
26
10
R
0
0
-
R/W
IO1
25
R
-
0
9
0
Description
Reserved
These bits can only be read from. The write value
should always be 0.
Channel 3 to 0 Interrupt Overflow
A bit for each channel indicates if the up-counters
or updown-counters have wrapped i.e. overflowed
from H'FFFF to H'0000 or underflowed from
H'0000 to H'FFFF.
0: The count has not overflowed or underflowed
1: The count has overflowed or underflowed
Channel 3 to 0 Interrupt Compare
A bit for each channel indicates whether in timer
mode, the free-running timer has become equal to
the channel times.
0: Timer has not become equal to the channel
1: Timer has become equal to the channel time
Channel 3 to 0 Interrupt Edge
A bit for each channel indicates whether an edge
that wil cause an action (active edge) has been
defected.
0: Channel 3 to 0 has not received an active edge
1: Channel 3 to 0 has received an active edge
R/W
IO0
24
R
0
8
0
-
time value
value
R/W
IC3
23
R
0
7
0
-
Rev. 2.00 Feb. 12, 2010 Page 557 of 1330
R/W
IC2
22
R
0
6
0
-
R/W
IC1
21
R
0
5
0
-
R/W
IC0
20
R
0
4
0
-
R/W
IE3
19
R
0
3
0
-
REJ09B0554-0200
R/W
IE2
18
R
0
2
0
-
R/W
IE1
17
R
0
1
0
-
R/W
IE0
16
R
0
0
0
-
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