HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 695
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
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(5) Serial Data Reception (Asynchronous Mode)
Figure 17.12 shows a sample flowchart for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
No
No
Figure 17.12 Sample Serial Reception Flowchart (1)
ER, DR, BRK or ORER = 1?
Clear RE bit in SCSCR to 0
Read ER, DR, BRK flags in
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Read receive data in
SCFSR and ORER
flag in SCFSR to 0
All data received?
Start of reception
End of reception
flag in SCLSR
RDF = 1?
No
Yes
Yes
Error handling
[1]
[2]
[3]
Yes
[1] Receive error handling and
[2] SCIF status check and receive
[3] Serial reception continuation
Rev. 2.00 Feb. 12, 2010 Page 611 of 1330
break detection:
flags in SCFSR, and the
ORER flag in SCLSR, to
identify any error, perform the
appropriate error handling,
then clear the DR, ER, BRK,
and ORER flags to 0. In the
case of a framing error, a
break can also be detected by
reading the value of the
SCIF_RXD pin.
data read:
RDF = 1, then read the receive
data in SCFRDR, read 1 from
the RDF flag, and then clear
the RDF flag to 0. The
transition of the RDF flag from
0 to 1 can also be identified by
an RXI interrupt.
procedure:
read at least the receive
trigger set number of receive
data bytes from SCFRDR,
read 1 from the RDF flag, then
clear the RDF flag to 0. The
number of receive data bytes
in SCFRDR can be
ascertained by reading from
SCRFDR.
Read the DR, ER, and BRK
Read SCFSR and check that
To continue serial reception,
REJ09B0554-0200
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