SAK-XC864L-1FRI 5V AA Infineon Technologies, SAK-XC864L-1FRI 5V AA Datasheet - Page 54

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SAK-XC864L-1FRI 5V AA

Manufacturer Part Number
SAK-XC864L-1FRI 5V AA
Description
IC MCU 8BIT 4KB FLASH 20TSSOP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet

Specifications of SAK-XC864L-1FRI 5V AA

Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
LIN, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
3.4.3
Each interrupt source, except for NMI, can be individually programmed to one of the four
possible priority levels. The NMI has the highest priority and supersedes all other
interrupts. Two pairs of interrupt priority registers (IP and IPH, IP1 and IPH1) are
available to program the priority level of each non-NMI interrupt vector.
A low-priority interrupt can be interrupted by a high-priority interrupt, but not by another
interrupt of the same or lower priority. Further, an interrupt of the highest priority cannot
be interrupted by any other interrupt source.
If two or more requests of different priority levels are received simultaneously, the
request of the highest priority is serviced first. If requests of the same priority are
received simultaneously, then an internal polling sequence determines which request is
serviced first. Thus, within each priority level, there is a second priority structure
determined by the polling sequence shown in
Table 19
Source
Non-Maskable Interrupt (NMI)
External Interrupt 0
Timer 0 Interrupt
External Interrupt 1
Timer 1 Interrupt
UART Interrupt
Timer 2,UART Normal Divider Overflow,
LIN
ADC Interrupt
SSC Interrupt
External Interrupt 2
External Interrupt 3
CCU6 Interrupt Node Pointer 0
CCU6 Interrupt Node Pointer 1
CCU6 Interrupt Node Pointer 2
CCU6 Interrupt Node Pointer 3
Data Sheet
Interrupt Priority
Priority Structure within Interrupt Level
50
Level
(highest)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Table
19.
Functional Description
V 1.1, 2009-03
XC864

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