UPD78F1143AGK-GAJ-AX Renesas Electronics America, UPD78F1143AGK-GAJ-AX Datasheet - Page 415
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UPD78F1143AGK-GAJ-AX
Manufacturer Part Number
UPD78F1143AGK-GAJ-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1143AGK-GAJ-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1143AGK-GAJ-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 415 of 880
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Figure 11-67. Flowchart of Slave Transmission/Reception (in Single- Transmission/Reception Mode)
Cautions 1. After setting the PER0 register to 1, be sure to set the SPS0 register after 4 or more clocks
2. Be sure to set transmit data to the SlOp register before the clock from the master is
have elapsed.
started.
SMR0n, SCR0n:
SDR0n[15:9]:
SO0, SOE0:
Clearing SAU1EN and SAU0EN
Starting transmission/reception
Setting SAU1EN and SAU0EN
Starting CSI communication
Writing transmit data to
Setting transfer rate by
End of communication
bits of PER0 register to 1
bits of PER0 register to 0
Writing 1 to SS0n bit
Writing 1 to ST0n bit
SIOp (=SDR0n[7:0])
Port manipulation
SIOp (=SDR0n[7:0])
Transmission/reception
Transfer end interrupt
SPS0 register
Yes
Yes
completed?
generated?
Reading
register
Setting communication
Setting 0000000B
Setting output
CHAPTER 11 SERIAL ARRAY UNIT
User’s Manual U17854EJ9V0UD
No
No
Perform initial setting when SE0n = 0.
413
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