SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 116

• Manufacturer Part Number: SAK-TC1736-128F80HL AA
• Description: IC MCU 32BIT 1MB FLASH 144LQFP
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1736-128F80HL AA

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 70
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Packages: PG-LQFP-144
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 48.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 1.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7) The RCLK max. input rise/fall times are best case parameters for
5.3.8.2
Table 19
Parameter
FCLP clock period
SOP/ENx outputs delay
from FCLP rising edge
SDI bit time
SDI rise time
SDI fall time
1) FCLP signal rise/fall times are the same as the A2 Pads rise/fall times.
2) FCLP signal high and low can be minimum 1 ×
3)
Figure 17
Note: Sample the data at SOP with the falling edge of FCLP in the target device.
Data Sheet
input signal rise/fall times can be used for longer RCLK clock periods.
T
MSCmin
FCLP
SOP
EN
SDI
=
T
Micro Second Channel (MSC) Interface Timing
SYS
MSC Interface Timing (Operating Conditions apply), C
MSC Interface Timing
= 1/
f
SYS
1)2)
. When
t
45
f
SYS
= 80 MHz,
Symbol
t
t
t
t
t
40
45
46
48
49
t
46
CC 2 ×
CC -10
CC 8 ×
SR
SR
t
40
t
40
T
Min.
MSC
= 25 ns
112
.
T
T
t
48
MSC
MSC
3)
t
Values
45
t
Typ.
–
46
f
SYS
= 80 MHz. For reduction of EMI, slower
Max.
–
10
–
100
100
t
Electrical Parameters
49
MSC_Tmg_1.vsd
Unit
ns
ns
ns
ns
ns
L
0.9
0.1
= 50 pF
0.9
0.1
V
V
V
V
V1.1, 2009-08
DDP
DDP
DDP
DDP
Note /
Test Con
dition
–
–
–
–
–
TC1736