C8051F023R Silicon Laboratories Inc, C8051F023R Datasheet - Page 225

IC 8051 MCU 64K FLASH 64TQFP

C8051F023R

Manufacturer Part Number
C8051F023R
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F023R

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
336-1035-2
22.
The C8051F020/1/2/3 devices contain 5 counter/timers: three are 16-bit counter/timers compatible with those found
in the standard 8051, and two are 16-bit auto-reload timers for use with the ADCs, SMBus, UART1, or for general
purpose use. These can be used to measure time intervals, count external events and generate periodic interrupt
requests. Timer 0 and Timer 1 are nearly identical and have four primary modes of operation. Timer 2 offers addi-
tional capabilities not available in Timers 0 and 1. Timer 3 is similar to Timer 2, but without the capture or Baud Rate
Generator modes. Timer 4 is identical to Timer 2, and can supply baud-rate generation capabilities to UART1.
When functioning as a timer, the counter/timer registers are incremented on each clock tick. Clock ticks are derived
from the system clock divided by either one or twelve as specified by the Timer Clock Select bits (T4M-T0M) in
CKCON, shown in Figure 22.1. The twelve-clocks-per-tick option provides compatibility with the older generation
of the 8051 family. Applications that require a faster timer can use the one-clock-per-tick option.
When functioning as a counter, a counter/timer register is incremented on each high-to-low transition at the selected
input pin. Events with a frequency of up to one-fourth the system clock's frequency can be counted. The input signal
need not be periodic, but it should be held at a given level for at least two full system clock cycles to ensure the level
is sampled.
Timer 0 and Timer 1:
Two 8-bit counter/timers
8-bit counter/timer with
13-bit counter/timer
16-bit counter/timer
(Timer 0 only)
TIMERS
auto-reload
Timer 2:
16-bit counter/timer with
16-bit counter/timer with
Baud rate generator for
auto-reload
UART0
capture
Rev. 1.4
Timer 3:
16-bit timer with auto-
reload
C8051F020/1/2/3
Timer 4
16-bit counter/timer with
16-bit counter/timer with
Baud rate generator for
auto-reload
UART1
capture
225

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