C8051F023R Silicon Laboratories Inc, C8051F023R Datasheet - Page 249

IC 8051 MCU 64K FLASH 64TQFP

C8051F023R

Manufacturer Part Number
C8051F023R
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F023R

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
336-1035-2
23.
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU interven-
tion than the standard 8051 counter/timers. PCA0 consists of a dedicated 16-bit counter/timer and five 16-bit capture/
compare modules. Each capture/compare module has its own associated I/O line (CEXn) which is routed through the
Crossbar to Port I/O when enabled (See
page
system clock, system clock divided by four, system clock divided by twelve, the external oscillator clock source
divided by 8, Timer 0 overflow, or an external clock signal on the ECI line. Each capture/compare module may be
configured to operate independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Out-
put, Frequency Output, 8-Bit PWM, or 16-Bit PWM (each is described in
controlled through the system controller's Special Function Registers. The basic PCA block diagram is shown in
Figure 23.1.
163). The counter/timer is driven by a programmable timebase that can select between six inputs as its source:
PROGRAMMABLE COUNTER ARRAY
Capture/Compare
Module 0
SYSCLK/12
Timer 0 Overflow
SYSCLK
External Clock/8
SYSCLK/4
ECI
Capture/Compare
Figure 23.1. PCA Block Diagram
Module 1
CLOCK
Section “17.1. Ports 0 through 3 and the Priority Crossbar Decoder” on
MUX
PCA
Crossbar
16-Bit Counter/Timer
Port I/O
Capture/Compare
Rev. 1.4
Module 2
Section
Capture/Compare
Module 3
C8051F020/1/2/3
23.2). The PCA is configured and
Capture/Compare
Module 4
249

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