PIC17C756-16/L Microchip Technology, PIC17C756-16/L Datasheet - Page 61

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PIC17C756-16/L

Manufacturer Part Number
PIC17C756-16/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-16/L

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
9.0
All PIC17C75X devices have an 8 x 8 hardware multi-
plier included in the ALU of the device. By making the
multiply a hardware operation, it completes in a single
instruction cycle. This is an unsigned multiply that gives
a 16-bit result. The result is stored into the 16-bit
PRODuct register (PRODH:PRODL). The multiplier
does not affect any flags in the ALUSTA register.
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
• Higher computational throughput
• Reduces code size requirements for multiply algo-
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 9-1 shows a performance comparison between
PIC17CXXX devices using the single cycle hardware
multiply, and performing the same function without the
hardware multiply.
Example 9-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
TABLE 9-1:
8 x 8 unsigned
8 x 8 signed
16 x 16 unsigned
16 x 16 signed
1997 Microchip Technology Inc.
rithms
Routine
HARDWARE MULTIPLIER
PERFORMANCE COMPARISON
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Multiply Method
Preliminary
Program Memory
Example 9-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s most significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 9-1:
EXAMPLE 9-2:
(Words)
13
21
24
52
36
1
6
MOVFP
MULWF
MOVFP
MULWF
BTFSC
SUBWF
MOVFP
BTFSC
SUBWF
ARG1, WREG
ARG2
ARG1, WREG
ARG2
ARG2, SB
PRODH, F
ARG2, WREG
ARG1, SB
PRODH, F
Cycles (Max)
8 x 8 UNSIGNED MULTIPLY
ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
242
254
69
24
36
1
6
;
; ARG1 * ARG2 ->
;
; ARG1 * ARG2 ->
;
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
DS30264A-page 61
PRODH:PRODL
PRODH:PRODL
@ 33 MHz
29.333 s
30.788 s
8.364 s
0.121 s
0.727 s
2.91 s
4.36 s
Time
- ARG1
- ARG2

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