ATMEGA103-6AI Atmel, ATMEGA103-6AI Datasheet - Page 37

IC MCU 128K 6MHZ A/D IT 64TQFP

ATMEGA103-6AI

Manufacturer Part Number
ATMEGA103-6AI
Description
IC MCU 128K 6MHZ A/D IT 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA103-6AI

Core Processor
AVR
Core Size
8-Bit
Speed
6MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power-down Mode
Power-save Mode
0945I–AVR–02/07
When the SM1/SM0 bits are set to 10, the SLEEP instruction makes the MCU enter the
Power-down mode. In this mode, the external Oscillator is stopped while the external
interrupts and the Watchdog (if enabled) continue operating. Only an External Reset, a
Watchdog Reset (if enabled), or an external level interrupt can wake up the MCU.
Note that if a level-triggered interrupt is used for wake-up from Power-down mode, the
changed level must be held for some time to wake up the MCU. This makes the MCU
less sensitive to noise. The changed level is sampled twice by the Watchdog Oscillator
clock and if the input has the required level during this time, the MCU will wake up. The
period of the Watchdog Oscillator is 1 µs (nominal) at 5.0V and 25°C. The frequency of
the Watchdog Oscillator is voltage-dependent, as shown in “Typical Characteristics” on
page 123.
When waking up from Power-down mode, a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable
after having been stopped. The wake-up period is defined by the same SUT fuses that
define the Reset Time-out period. The wake-up period is equal to the clock reset period,
as shown in Table 5 on page 27.
If the wake-up condition disappears before the MCU wakes up and starts to execute,
e.g., a low-level on is not held long enough, the interrupt causing the wake-up will not be
executed.
When the SM1/SM0 bits are 11, the SLEEP instruction makes the MCU enter the
Power-save mode. This mode is identical to Power-down, with one exception:
If Timer/Counter0 is clocked asynchronously, i.e., the AS0 bit in ASSR is set,
Timer/Counter0 will run during sleep. In addition to the Power-down wake-up sources,
the device can also wake up from either Timer Overflow or Output Compare event from
Timer/Counter0 if the corresponding Timer/Counter0 interrupt enable bits are set in
TIMSK. To ensure that the part executes the interrupt routine when waking up, also set
the Global Interrupt Enable bit i SREG.
When waking up from Power-save mode by an external interrupt, two instruction cycles
are executed before the Interrupt Flags are updated. When waking up by the asynchro-
nous timer, three instruction cycles are executed before the flags are updated. During
these cycles, the processor executes instructions, but the interrupt condition is not read-
able and the interrupt routine has not started yet. If the asynchronous timer is not
clocked asynchronously, Power-down mode is recommended instead of Power-save
mode because the contents of the registers in the asynchronous timer should be consid-
ered undefined after wake-up in Power-save mode if AS0 is 0.
ATmega103(L)
37

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