ATMEGA169-16AI Atmel, ATMEGA169-16AI Datasheet - Page 15
![IC AVR MCU 16K 16MHZ IND TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA169-16AI
Manufacturer Part Number
ATMEGA169-16AI
Description
IC AVR MCU 16K 16MHZ IND TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169-16AI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Manufacturer
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AVR ATmega169
Memories
In-System
Reprogrammable Flash
Program Memory
2514P–AVR–07/06
This section describes the different memories in the ATmega169. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega169 features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega169 contains 16K bytes On-chip In-System Reprogrammable Flash mem-
ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is
organized as 8K x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega169 Program Counter (PC) is 13 bits wide, thus addressing the 8K program
memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in “Boot Loader Support – Read-
While-Write Self-Programming” on page 252. “Memory Programming” on page 266 con-
tains a detailed description on Flash data serial downloading using the SPI pins or the
JTAG interface.
Constant tables can be allocated within the entire program memory address space (see
the LPM – Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in “Instruction Execu-
tion Timing” on page 12.
Figure 8. Program Memory Map
Application Flash Section
Boot Flash Section
Program Memory
ATmega169/V
0x0000
0x1FFF
15
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