DSPIC30F2010-30I/SO Microchip Technology, DSPIC30F2010-30I/SO Datasheet - Page 135
DSPIC30F2010-30I/SO
Manufacturer Part Number
DSPIC30F2010-30I/SO
Description
IC DSPIC MCU/DSP 12K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2010-20ISO.pdf
(202 pages)
3.DSPIC30F2010-20ISO.pdf
(18 pages)
4.DSPIC30F2010-20ISO.pdf
(6 pages)
5.DSPIC30F2010-20ISO.pdf
(26 pages)
6.DSPIC30F2010-20IMM.pdf
(204 pages)
Specifications of DSPIC30F2010-30I/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
20
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2010-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
DSPIC30F2010-30I/SOG
Manufacturer:
TOS
Quantity:
453
TABLE 19-7:
TABLE 19-8:
RCON
OSCCON
Legend:
Note:
FOSC
FWDT
FBORPOR
FGS
FICD
Legend:
Note:
SFR Name
File Name
— = unimplemented bit
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
— = unimplemented bit
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Addr.
0740
0742
F80000
F80002
F80004
F8000A
F8000C
Addr.
SYSTEM INTEGRATION REGISTER MAP
DEVICE CONFIGURATION REGISTER MAP
TRAPR
Bit 15
TUN3
Bits 23-16
IOPUWR
—
—
—
—
—
Bit 14
TUN2
FWDTEN
MCLREN
Bit 13
BGST
Bit 15
COSC<1:0>
FCKSM<1:0>
—
—
Bit 12
—
Bit 14
—
—
—
—
Bit 11
TUN1
—
Bit 13
—
—
—
—
—
Bit 10
TUN0
—
Bit 12
Bit 9
NOSC<1:0>
—
—
—
—
—
—
Bit 8
Bit 11
—
—
—
—
—
—
EXTR
Bit 7
POST<1:0>
PWMPIN
Bit 10
—
—
—
—
SWR
Bit 6
SWDTEN
HPOL
LOCK
Bit 9
Bit 5
—
—
—
FOS<1:0>
LPOL
Bit 8
WDTO
—
—
—
Bit 4
—
BOREN
BKBUG
SLEEP
Bit 7
Bit 3
—
—
—
CF
Bit 2
IDLE
—
Bit 6
COE
—
—
—
—
LPOSCEN
Bit 1
BOR
Bit 5
FWPSA<1:0>
BORV<1:0>
—
—
—
OSWEN Depends on Configuration bits.
Bit 4
Bit 0
POR
—
—
—
Bit 3
Depends on type of Reset.
—
—
—
Bit 2
FWPSB<3:0>
—
—
—
Reset State
FPR<3:0>
Bit 1
GCP
FPWRT<1:0>
ICS<1:0>
GWRP
Bit 0