AT91FR40162S-CJ Atmel, AT91FR40162S-CJ Datasheet - Page 151

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AT91FR40162S-CJ

Manufacturer Part Number
AT91FR40162S-CJ
Description
IC ARM MCU FLASH 1K 121BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91FR40162S-CJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
75MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
2MB (1M x 16)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
121-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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6174B–ATARM–07-Nov-05
The Timer Counter channel can also be configured to have an external trigger. In Capture Mode,
the external trigger signal can be selected between TIOA and TIOB. In Waveform Mode, an
external event can be programmed on one of the following signals: TIOB, XC0, XC1 or XC2.
This external event can then be programmed to perform a trigger by setting ENETRG in
TC_CMR.
If an external trigger is used, the duration of the pulses must be longer than the system clock
(MCK) period in order to be detected.
Whatever the trigger used, it will be taken into account at the following active edge of the
selected clock. This means that the counter value may not read zero just after a trigger, espe-
cially when a low frequency signal is selected as the clock.
• Software Trigger: Each channel has a software trigger, available by setting SWTRG in
• SYNC: Each channel has a synchronization signal SYNC. When asserted, this signal has the
• Compare RC Trigger: RC is implemented in each channel and can provide a trigger when the
TC_CCR.
same effect as a software trigger. The SYNC signals of all channels are asserted
simultaneously by writing TC_BCR (Block Control) with SYNC set.
counter value matches the RC value if CPCTRG is set in TC_CMR.
AT91FR40162S Preliminary
151

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