AT91FR40162S-CJ Atmel, AT91FR40162S-CJ Datasheet - Page 50
AT91FR40162S-CJ
Manufacturer Part Number
AT91FR40162S-CJ
Description
IC ARM MCU FLASH 1K 121BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91FR40162S-CJ.pdf
(210 pages)
Specifications of AT91FR40162S-CJ
Core Processor
ARM7
Core Size
16/32-Bit
Speed
75MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
2MB (1M x 16)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
121-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91FR40162S-CJ
Manufacturer:
ATMEL
Quantity:
455
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11.1
Figure 11-1.
11.2
11.2.1
11.2.2
50
Block Diagram
Device Operation
AT91FR40162S Preliminary
Read
Command Sequences
A0 - A19
Y-Decoder
X-Decoder
Address
Buffer
Latch
Input
The Flash Memory is accessed like an EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the address pins are asserted on the outputs.
The outputs are put in the high impedance state whenever CE or OE is high. This dual-line con-
trol gives designers flexibility in preventing bus contention.
When the device is first powered on, it will be reset to the read or standby mode, depending
upon the state of the control line inputs. In order to perform other device functions, a series of
command sequences are entered into the device. The command sequences are shown in the
”Command Definition Table” on page 61
codes). The command sequences are written by applying a low pulse on the WE or CE input
with CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE
or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Standard
microprocessor write timings are used. The address locations used in the command sequences
are not affected by entering the command sequences.
Output
Buffer
I/O0 - I/O15/A-1
Main Memory
Comparator
Y-GATING
Identifier
Register
Register
Status
Data
Buffer
Input
(I/O8 - I/O15 are don’t care inputs for the command
Write State
Command
Register
Machine
Program/Erase
Voltage Switch
CE
WE
OE
RESET
BYTE
RDY/BUSY
VPP
VCC
GND
6174B–ATARM–07-Nov-05
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