AT91FR40162S-CJ Atmel, AT91FR40162S-CJ Datasheet - Page 68
AT91FR40162S-CJ
Manufacturer Part Number
AT91FR40162S-CJ
Description
IC ARM MCU FLASH 1K 121BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91FR40162S-CJ.pdf
(210 pages)
Specifications of AT91FR40162S-CJ
Core Processor
ARM7
Core Size
16/32-Bit
Speed
75MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
2MB (1M x 16)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
121-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91FR40162S-CJ
Manufacturer:
ATMEL
Quantity:
455
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12. PS: Power-saving
12.1
68
Peripheral Clocks
AT91FR40162S Preliminary
The AT91X40 Series’ Power-saving feature enables optimization of power consumption. The PS
controls the CPU and Peripheral Clocks. One control register (PS_CR) enables the user to stop
the ARM7TDMI Clock and enter Idle Mode. One set of registers with a set/clear mechanism
enables and disables the peripheral clocks individually.
The ARM7TDMI clock is enabled after a reset and is automatically re-enabled by any enabled
interrupt in the Idle Mode.
The clock of each peripheral integrated in the AT91FR40162S can be individually enabled and
disabled by writing to the Peripheral Clock Enable (PS_PCER) and Peripheral Clock Disable
Registers (PS_PCDR). The status of the peripheral clocks can be read in the Peripheral Clock
Status Register (PS_PCSR).
When a peripheral clock is disabled, the clock is immediately stopped. When the clock is re-
enabled, the peripheral resumes action where it left off.
To avoid data corruption or erroneous behavior of the system, the system software only disables
the clock after all programmed peripheral operations have finished.
The peripheral clocks are automatically enabled after a reset.
The bits that control the peripheral clocks are the same as those that control the Interrupt
Sources in the AIC.
6174B–ATARM–07-Nov-05
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