C8051F350 Silicon Laboratories Inc, C8051F350 Datasheet - Page 193

IC 8051 MCU 8K FLASH 32LQFP

C8051F350

Manufacturer Part Number
C8051F350
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F350

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Data Bus Width
8 bit
Data Rom Size
128 B
On-chip Adc
10 bit
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Mounting Style
SMD/SMT
Height
1.4 mm
Length
7 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Width
7 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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22.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload
Mode 2 configures Timer 0 and Timer 1 to operate as 8-bit counter/timers with automatic reload of the start
value. TL0 holds the count and TH0 holds the reload value. When the counter in TL0 overflows from all
ones to 0x00, the timer overflow flag TF0 (TCON.5) is set and the counter in TL0 is reloaded from TH0. If
Timer 0 interrupts are enabled, an interrupt will occur when the TF0 flag is set. The reload value in TH0 is
not changed. TL0 must be initialized to the desired value before enabling the timer for the first count to be
correct. When in Mode 2, Timer 1 operates identically to Timer 0.
Both counter/timers are enabled and configured in Mode 2 in the same manner as Mode 0. Setting the
TR0 bit (TCON.4) enables the timer when either GATE0 (TMOD.3) is logic 0 or when the input signal /INT0
is active as defined by bit IN0PL in register IT01CF (see
details on the external input signals /INT0 and /INT1).
/INT0
T0
Crossbar
Pre-scaled Clock
SYSCLK
IN0PL
GATE0
Figure 22.2. T0 Mode 2 Block Diagram
XOR
0
1
TR0
M
H
T
3
M
T
3
L
CKCON
M
T
H
2
M
T
2
L
0
1
M
T
1
M
T
0
S
C
A
1
S
C
A
0
Rev. 0.4
G
A
T
E
1
C
T
1
/
M
T
1
1
TMOD
Section “12.5. External Interrupts” on page 105
M
T
1
0
TCLK
G
A
T
E
0
C
T
0
/
M
T
0
1
M
T
0
0
(8 bits)
(8 bits)
TH0
TL0
N
P
1
L
I
N
S
1
L
2
I
INT01CF
N
S
1
L
1
I
C8051F350/1/2/3
N
1
S
L
0
I
N
0
P
L
I
Reload
N
S
0
L
2
I
N
S
0
L
1
I
N
0
S
L
0
I
TR1
TR0
TF1
TF0
IE1
IE0
IT1
IT0
Interrupt
193
for

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