C8051F350 Silicon Laboratories Inc, C8051F350 Datasheet - Page 21

IC 8051 MCU 8K FLASH 32LQFP

C8051F350

Manufacturer Part Number
C8051F350
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F350

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Data Bus Width
8 bit
Data Rom Size
128 B
On-chip Adc
10 bit
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Mounting Style
SMD/SMT
Height
1.4 mm
Length
7 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Width
7 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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1.3.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
Program memory consists of 8 kB bytes of FLASH. This memory may be reprogrammed in-system in 512
byte sectors, and requires no special off-chip programming voltage.
0x1DFF
0x1FFF
0x1E00
0x0000
On-Chip Memory
PROGRAM/DATA MEMORY
Programmable in 512
Byte Sectors)
RESERVED
(In-System
8K FLASH
(FLASH)
Figure 1.6. Memory Map
0xFFFF
0x01FF
0x0200
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
0x0000 to 0x01FF, wrapped
XRAM - 512 Bytes
(accessable using MOVX
Same 512 bytes as from
Rev. 0.4
(Indirect Addressing
on 512-byte boundaries
(Direct and Indirect
EXTERNAL DATA ADDRESS SPACE
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
C8051F350/1/2/3
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
21

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