HD64F2378RVFQ33 Renesas Electronics America, HD64F2378RVFQ33 Datasheet - Page 473

• Manufacturer Part Number: HD64F2378RVFQ33
• Description: IC H8S MCU FLASH 512K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2378RVFQ33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

8.4.11
Auto Request/Cycle Steal Mode/Normal Transfer Mode: When the EDA bit is set to 1 in
EDMDR, an EXDMA transfer cycle is started a minimum of three cycles later. There is a one-
cycle bus release interval between the end of a one-transfer-unit EXDMA cycle and the start of the
next transfer.
If there is a transfer request for another channel of higher priority, the transfer request by the
original channel is held pending, and transfer is performed on the higher-priority channel from the
next transfer. Transfer on the original channel is resumed on completion of the higher-priority
channel transfer.
Figures 8.28 to 8.30 show operation timing examples for various conditions.
φ pin
Bus cycle
CPU
operation
ETEND
EDA bit
Examples of Operation Timing in Each Mode
EDA = 1
write
Figure 8.28 Auto Request/Cycle Steal Mode/Normal Transfer Mode
0
Bus release
1
Internal bus space
3 cycles
cycles
(No Contention/Dual Address Mode)
EXDMA
read
EXDMA
write
1 cycle
Bus
release
EXDMA
Rev.7.00 Mar. 18, 2009 page 405 of 1136
read
Section 8 EXDMA Controller (EXDMAC)
EXDMA
write
Bus
release
EXDMA
Last transfer cycle
read
REJ09B0109-0700
EXDMA
write
0