SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 371
SAF-C161U-LF V1.3
Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C161U-LF_V1.3.pdf
(469 pages)
Specifications of SAF-C161U-LF V1.3
Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
SAFC161ULFV13XP
SP000007502
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Segment Address Lines
Pins P0H.4 and P0H.3 (SALSEL) define the number of active segment address lines
during reset. This allows the selection which pins of Port 4 drive address lines and which
are used for general purpose IO. The two bits are latched in register RP0H. Depending
on the system architecture the required address space is chosen and accessible right
from the start, so the initialization routine can directly access all locations without prior
programming. The required pins of Port 4 are automatically switched to address output
mode.
Even if not all segment address lines are enabled on Port 4, the C161U internally uses
its complete 24-bit addressing mechanism. This allows the restriction of the width of the
effective address bus, while still deriving CS signals from the complete addresses.
Default: 2-bit segment address (A17...A16) allowing access to 256 KByte.
Note: The selected number of segment address lines cannot be changed via software
Clock Generation Control
Pins P0H.7, P0H.6 and P0H.5 (CLKCFG) select the clock generation mode (on-chip
PLL) during reset. Please refer to Chapter 3.3, "Clock Generation Concept".
Data Sheet
CSSEL
1 1
1 0
0 1
0 0
SALSEL
1 1
1 0
0 1
0 0
after reset.
Chip Select Lines
Four: CS3...CS0
None
Two:
Three:
Segment Address Lines
Two:
Eight:
None
Four:
CS1...CS0
CS2...CS0
A17...A16
A20...A16
A19...A16
371
Note
Default without pull-downs
Port 6 pins free for I/O
P6.4..P6.2 free for GPI/O
P6.4..P6.3 free for GPI/O
Directly accessible Address Space
256
2
64
1
KByte (Default without pull-downs)
MByte (Maximum)
KByte (Minimum)
MByte
System Reset
2001-04-19
C161U
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