MAX3798ETJ+ Maxim Integrated Products, MAX3798ETJ+ Datasheet - Page 23

• Manufacturer Part Number: MAX3798ETJ+
• Description: IC LIMITING AMP/VCSEL DVR 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX3798ETJ+

• Amplifier Type: Limiting
• Number Of Circuits: 1
• Output Type: Differential
• Current - Supply: 97mA
• Voltage - Supply, Single/dual (±): 2.85 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Operating Temperature Range: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• -3db Bandwidth: -
• Slew Rate: -
• Gain Bandwidth Product: -
• Current - Input Bias: -
• Voltage - Input Offset: -
• Lead Free Status / Rohs Status: Details

Bit 2: RX_EN. Enables or disables the receive circuitry.
Bit 1: RXDE_EN. Enables or disables the deemphasis on the receiver output.
Bit 0: AZ_EN. Enables or disables the autozero circuitry. When RX_EN is set to 0, the autozero circuitry is also disabled.
Bit 0: LOS. Copy of the LOS output circuitry. This is a sticky bit, which means that it is cleared on a read. The first 0-
to-1 transition gets latched until the bit is read by the master or POR occurs.
Bits 7 to 0: SET_CML[7:0]. The SET_CML register is an 8-bit register that can be set to range from 0 to 255, corre-
sponding from 40mV
voltage vs. DAC code graph.
Bits 5 to 0: SET_LOS[5:0]. The SET_LOS register is a 6-bit register used to program the LOS threshold. See the
Typical Operating Characteristics section for a typical LOS threshold voltage vs. DAC code graph.
Bit #
Name
Default Value
Bit #
Name
Default Value
Bit #
Name
Default Value
Power SFP+ Limiting Amplifier and VCSEL Driver
0 = disabled
1 = enabled
0 = disabled
1 = enabled
0 = disabled
1 = enabled
1.0625Gbps to 10.32Gbps, Integrated, Low-
SET_CML[7]
(MSB)
______________________________________________________________________________________
7
0
7
X
X
7
X
X
P-P
to 1200mV
SET_CML[6] SET_CML[5] SET_CML[4] SET_CML[3] SET_CML[2] SET_CML[1]
6
1
X
X
6
X
X
6
P-P
SET_LOS[5]
. See the Typical Operating Characteristics section for a typical CML output
(MSB)
X
X
5
0
5
0
5
SET_LOS[4]
X
X
4
1
4
4
0
SET_LOS[3]
LOS Threshold Level Setting Register (SET_LOS)
X
X
3
0
3
3
1
Output CML Level Setting Register (SET_CML)
SET_LOS[2]
2
0
X
X
2
1
2
Receiver Status Register (RXSTAT)
SET_LOS[1]
1
1
X
X
1
0
1
SET_CML[0]
SET_LOS[0]
(STICKY)
(LSB)
(LSB)
LOS
0
1
X
0
0
0
ADDRESS
ADDRESS
ADDRESS
H0x03
H0x02
H0x04
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