MAX3798ETJ+ Maxim Integrated Products, MAX3798ETJ+ Datasheet - Page 32

• Manufacturer Part Number: MAX3798ETJ+
• Description: IC LIMITING AMP/VCSEL DVR 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX3798ETJ+

• Amplifier Type: Limiting
• Number Of Circuits: 1
• Output Type: Differential
• Current - Supply: 97mA
• Voltage - Supply, Single/dual (±): 2.85 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Operating Temperature Range: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• -3db Bandwidth: -
• Slew Rate: -
• Gain Bandwidth Product: -
• Current - Input Bias: -
• Voltage - Input Offset: -
• Lead Free Status / Rohs Status: Details

1.0625Gbps to 10.32Gbps, Integrated, Low-
Power SFP+ Limiting Amplifier and VCSEL Driver
Table 7. Register Summary (continued)
32
Modulation
Current Increment
Setting Register
Address = H0x0C
Bias Current
Increment Setting
Register
Address = H0x0D
Mode Control
Register
Address = H0x0E
Transmitter Pulse-
Width Control
Register
Address = H0x0F
Transmitter
Deemphasis
Control Register
Address = H0x10
FUNCTION/
REGISTER
ADDRESS
______________________________________________________________________________________
MODECTRL
REGISTER
SET_TXDE
MODINC
BIASINC
PWCTRL
NAME
SET_
NORMAL
MODE
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
R
R
R
SETUP
MODE
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
NUMBER
/TYPE
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
3
2
1
0
3
2
1
0
SET_PWCTRL[3]
SET_PWCTRL[2]
SET_PWCTRL[1]
SET_PWCTRL[0]
MODECTRL[7]
MODECTRL[6]
MODECTRL[5]
MODECTRL[4]
MODECTRL[3]
MODECTRL[2]
MODECTRL[1]
MODECTRL[0]
SET_IMOD[0]
SET_IBIAS[0]
SET_TXDE[3]
SET_TXDE[2]
SET_TXDE[1]
SET_TXDE[0]
MODINC[4]
MODINC[3]
MODINC[2]
MODINC[1]
MODINC[0]
BIASINC[4]
BIASINC[3]
BIASINC[2]
BIASINC[1]
BIASINC[0]
BIT NAME
DE_INC
X
X
X
DEFAULT
VALUE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
LSB of SET_IMOD DAC
register address = H0x09
Deemphasis increment
0: no update, 1: SET_TXDE
updates ±1 LSB
MSB MOD DAC two’s
complement
LSB MOD DAC two’s
complement
LSB of SET_IBIAS DAC
register address = H0x08
MSB bias DAC two’s
complement
LSB bias DAC two’s
complement
MSB mode control
LSB mode control
MSB Tx pulse-width control
LSB Tx pulse-width control
MSB Tx deemphasis
LSB Tx deemphasis
NOTES