MAX3798ETJ+ Maxim Integrated Products, MAX3798ETJ+ Datasheet - Page 26

• Manufacturer Part Number: MAX3798ETJ+
• Description: IC LIMITING AMP/VCSEL DVR 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX3798ETJ+

• Amplifier Type: Limiting
• Number Of Circuits: 1
• Output Type: Differential
• Current - Supply: 97mA
• Voltage - Supply, Single/dual (±): 2.85 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Operating Temperature Range: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• -3db Bandwidth: -
• Slew Rate: -
• Gain Bandwidth Product: -
• Current - Input Bias: -
• Voltage - Input Offset: -
• Lead Free Status / Rohs Status: Details

1.0625Gbps to 10.32Gbps, Integrated, Low-
Power SFP+ Limiting Amplifier and VCSEL Driver
Bit 7: SET_IMOD[0]. This is the LSB of the SET_IMOD[8:0] bits. This bit can only be updated by the use of
MODINC[4:0].
Bit 5: DE_INC. When this bit is set to 1 and the deemphasis on the transmit output is enabled, the SET_TXDE[3:0] is
incremented or decremented by 1 LSB. The increment or decrement is determined by the sign bit of the MODINC[4:0]
string of bits.
Bits 4 to 0: MODINC[4:0]. This string of bits is used to increment or decrement the modulation current. When written
to, the SET_IMOD[8:0] bits are updated. MODINC[4:0] are a two’s complement string.
Bit 7: SET_IBIAS[0]. This is the LSB of the SET_IBIAS[8:0] bits. This bit can only be updated by the use of BIASINC[4:0].
Bits 4 to 0: BIASINC[4:0]. This string of bits is used to increment or decrement the bias current. When written to, the
SET_IBIAS[8:0] bits are updated. BIASINC[4:0] are a two’s complement string.
Bits 7 to 0: MODECTRL[7:0]. The MODECTRL register enables a switch between normal and setup modes. The
setup mode is achieved by setting this register to H0x12. MODECTRL must be updated before each write operation.
Exceptions are MODINC and BIASINC, which can be updated in normal mode.
Bits 3 to 0: SET_PWCTRL[3:0]. This is a 4-bit register used to control the eye crossing by adjusting the pulse width.
Bit #
Name
Default Value
Bit #
Name
Default Value
Bit #
Name
Default Value
Bit #
Name
Default Value
26
______________________________________________________________________________________
MODECTRL
SET_IMOD
SET_IBIAS
[7] (MSB)
[0]
[0]
7
0
7
0
7
0
7
X
X
MODECTRL
[6]
6
X
0
6
X
0
6
0
6
X
X
MODECTRL
DE_INC
[5]
5
0
5
X
0
5
0
5
X
X
MODINC[4]
BIASINC[4]
MODECTRL
(MSB)
(MSB)
[4]
X
X
4
0
4
0
4
0
4
Transmitter Pulse-Width Control Register (SET_PWCTRL)
Modulation Current Increment Setting Register (MODINC)
MODINC[3] MODINC[2] MODINC[1]
BIASINC[3] BIASINC[2] BIASINC[1]
MODECTRL
PWCTRL[3]
(MSB)
Bias Current Increment Setting Register (BIASINC)
SET_
[3]
3
0
3
0
3
0
3
0
MODECTRL
PWCTRL[2]
SET_
[2]
2
0
2
0
2
0
2
0
Mode Control Register (MODECTRL)
MODECTRL
PWCTRL[1]
SET_
[1]
1
0
1
0
1
0
1
0
MODINC[0]
BIASINC[0]
MODECTRL
PWCTRL[0]
[0] (LSB)
(LSB)
(LSB)
(LSB)
SET_
0
0
0
0
0
0
0
0
ADDRESS
ADDRESS
ADDRESS
ADDRESS
H0x0C
H0x0D
H0x0E
H0x0F