FDMS7682 Fairchild Semiconductor, FDMS7682 Datasheet - Page 2

MOSFET N-CH 30V 22A POWER56

FDMS7682

Manufacturer Part Number
FDMS7682
Description
MOSFET N-CH 30V 22A POWER56
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet

Specifications of FDMS7682

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
6.3 mOhm @ 14A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
16A
Vgs(th) (max) @ Id
3V @ 250µA
Gate Charge (qg) @ Vgs
30nC @ 10V
Input Capacitance (ciss) @ Vds
1885pF @ 15V
Power - Max
2.5W
Mounting Type
Surface Mount
Package / Case
8-PowerTDFN
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
6.3 mOhms
Forward Transconductance Gfs (max / Min)
70 S
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
22 A
Power Dissipation
33 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Gate Charge Qg
9.9 nC
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDMS7682TR

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FDMS7682 Rev.C
Notes:
1. R
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
ΔBV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
t
Q
ΔV
DSS
GSS
d(on)
r
d(off)
f
rr
rr
DS(on)
the user's board design.
FS
GS(th)
SD
iss
oss
rss
g
ΔT
ΔT
g
g
gs
gd
rr
rr
Symbol
θJA
AS
DSS
GS(th)
DSS
J
J
of 29 mJ is based on starting T
is determined with the device mounted on a 1in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current, Forward V
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
J
= 25
Parameter
°
C, L = 0.3 mH, I
a)
2
T
50 °C/W when mounted on a
1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
2
= 25 °C unless otherwise noted
pad of 2 oz copper
AS
= 14 A, V
DD
= 27 V, V
V
V
I
I
V
V
I
V
V
V
V
V
f = 1 MHz
I
I
V
V
V
V
F
F
D
D
D
GS
GS
DS
GS
GS
GS
GS
GS
DS
DS
DD
GS
GS
GS
= 14 A, di/dt = 100 A/μs
= 14 A, di/dt = 300 A/μs
= 250 μA, referenced to 25 °C
= 250 μA, V
= 250 μA, referenced to 25 °C
= 0 V, I
= 0 V, I
= 5 V, I
= 15 V, V
= 24 V, V
= ±20 V, V
= V
= 10 V, I
= 4.5 V, I
= 10 V, I
= 15 V, I
= 10 V, R
= 0 V to 10 V
= 0 V to 4.5 V
GS
2
DS
= 10 V. 100% test at L = 0.1 mH, I
Test Conditions
, I
S
S
D
D
D
D
D
= 2.1 A
= 14 A
= 14 A
D
GS
GS
GEN
GS
= 250 μA
= 14 A
= 14 A, T
= 14 A,
DS
= 11 A
= 0 V
= 0 V,
= 0 V
= 0 V
= 6 Ω
V
I
D
DD
= 14 A
J
= 15 V,
= 125 °C
(Note 2)
(Note 2)
b)
θJC
125 °C/W when mounted on a
minimum pad of 2 oz copper.
is guaranteed by design while R
AS
= 21 A.
1.25
Min
30
1416
0.74
0.83
479
Typ
0.7
9.4
2.7
2.2
9.9
4.3
2.8
1.9
5.2
8.0
7.0
50
27
10
20
17
22
21
70
15
-6
1885
Max
10.4
640
θCA
100
2.4
1.2
1.3
3.0
6.3
8.5
21
30
75
19
10
35
10
30
14
43
36
www.fairchildsemi.com
1
is determined by
mV/°C
mV/°C
Units
nC
nC
nC
nC
nC
nC
μA
nA
pF
pF
pF
ns
ns
ns
ns
ns
ns
Ω
V
V
V
S

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