ATA5773-PXQW Atmel, ATA5773-PXQW Datasheet - Page 216
ATA5773-PXQW
Manufacturer Part Number
ATA5773-PXQW
Description
XMITTR UHF ASK/FSK 310MHZ 24VQFN
Manufacturer
Atmel
Datasheet
1.ATA5773-DK1.pdf
(219 pages)
Specifications of ATA5773-PXQW
Frequency
310MHz ~ 350MHz
Modulation Or Protocol
UHF
Power - Output
8dBm
Voltage - Supply
2 V ~ 4 V
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA5x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Receiving
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA5773-PXQW
Manufacturer:
ATMEL
Quantity:
3 500
Part Number:
ATA5773-PXQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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9.2
216
LDD
LDS
ST
ST
ST
ST
ST
ST
STD
ST
ST
ST
STD
STS
LPM
LPM
LPM
SPM
IN
OUT
PUSH
POP
MCU CONTROL INSTRUCTIONS
NOP
SLEEP
WDR
BREAK
Mnemonics
Instruction Set Summary (Continued)
Atmel ATA5771/73/74
Rd, Z+q
Rd, k
X, Rr
X+, Rr
- X, Rr
Y, Rr
Y+, Rr
- Y, Rr
Y+q,Rr
Z, Rr
Z+, Rr
-Z, Rr
Z+q,Rr
k, Rr
Rd, Z
Rd, Z+
Rd, P
P, Rr
Rr
Rd
Operands
Load Indirect with Displacement
Load Direct from SRAM
Store Indirect
Store Indirect and Post-Inc.
Store Indirect and Pre-Dec.
Store Indirect
Store Indirect and Post-Inc.
Store Indirect and Pre-Dec.
Store Indirect with Displacement
Store Indirect
Store Indirect and Post-Inc.
Store Indirect and Pre-Dec.
Store Indirect with Displacement
Store Direct to SRAM
Load Program Memory
Load Program Memory
Load Program Memory and Post-Inc
Store Program Memory
In Port
Push Register on Stack
Pop Register from Stack
No Operation
Sleep
Watchdog Reset
Break
Out Port
Description
Rd
Rd
(X)
(X)
X
(Y)
(Y)
Y
(Y + q)
(Z)
(Z)
Z
(Z + q)
(k)
R0
Rd
Rd
(z)
Rd
P
STACK
Rd
(see specific descr. for Sleep function)
(see specific descr. for WDR/Timer)
For On-chip Debug Only
Z - 1, (Z)
X - 1, (X)
Y - 1, (Y)
Rr
Rr
R1:R0
(Z + q)
Rr
Rr, Z
(Z)
(Z)
(Z), Z
P
STACK
Rr
Rr, X
Rr
Rr, Y
(k)
Rr
Rr
Rr
Z + 1
X + 1
Y + 1
Z+1
Rr
Rr
Rr
Operation
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Flags
9137E–RKE–12/10
#Clocks
N/A
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
1
1
2
2
1
1
1
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