ATA5773-PXQW Atmel, ATA5773-PXQW Datasheet - Page 74

XMITTR UHF ASK/FSK 310MHZ 24VQFN

ATA5773-PXQW

Manufacturer Part Number
ATA5773-PXQW
Description
XMITTR UHF ASK/FSK 310MHZ 24VQFN
Manufacturer
Atmel
Datasheet

Specifications of ATA5773-PXQW

Frequency
310MHz ~ 350MHz
Modulation Or Protocol
UHF
Power - Output
8dBm
Voltage - Supply
2 V ~ 4 V
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA5x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA5773-PXQW
Manufacturer:
ATMEL
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ATA5773-PXQW
Manufacturer:
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4.14.4
4.14.4.1
4.14.4.2
74
Atmel ATA5771/73/74
Register Description
MCUCR – MCU Control Register
PORTA – Port A Data Register
Table 4-29.
1.
2.
• Bits 7, 2– Res: Reserved Bits
These bits are reserved bits in the ATtiny44V and will always read as zero.
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
tion 4.14.2.1 “Configuring the Pin” on page 62
Bit
Read/Write
Initial Value
Bit
0x1B (0x3B)
Read/Write
Initial Value
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
EXT_OSC = crystal oscillator or low frequency crystal oscillator is selected as system clock.
EXT_CLOCK = external clock is selected as system clock.
PB1/XTAL2/PCINT9
EXT_OSC
0
EXT_OSC
0
EXT_OSC
0
0
EXT_OSC
PCINT9 • PCIE1
EXT_OSC
PCINT9 Input
XTAL2
PORTA7
Overriding Signals for Alternate Functions in PB1..PB0
R/W
R
7
0
7
0
(1)
(1)
(1)
(1)
(1)
PORTA6
+
• PCINT9 • PCIE1
PUD
R/W
R/W
6
0
6
0
PORTA5
R/W
R/W
SE
5
0
5
0
PORTA4
R/W
4
0
SM1
R/W
4
0
PB0/XTAL1/PCINT8
EXT_CLOCK
0
EXT_CLOCK
0
EXT_CLOCK
0
0
EXT_CLOCK
(PCINT8 • PCIE1)
( EXT_CLOCK
(EXT_CLOCK
CLOCK/PCINT8 Input
XTAL1
for more details about this feature.
PORTA3
R/W
3
0
SM0
R/W
3
0
(2)
(2)
(2
(2)
(2)
PORTA2
(2)
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
R/W
+ EXT_OSC
• EXT_OSC
2
0
• PWR_DOWN ) +
R
2
0
PORTA1
ISC01
R/W
1
0
(1)
R
1
0
(1)
(1)
(1)
(1)
+
• PCINT8 • PCIE1)
PORTA0
ISC00
R/W
R
0
0
0
0
9137E–RKE–12/10
MCUCR
PORTA
Sec-

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