ATA5773-PXQW Atmel, ATA5773-PXQW Datasheet - Page 44

• Manufacturer Part Number: ATA5773-PXQW
• Description: XMITTR UHF ASK/FSK 310MHZ 24VQFN
• Manufacturer: Atmel

Specifications of ATA5773-PXQW

• Frequency: 310MHz ~ 350MHz
• Modulation Or Protocol: UHF
• Power - Output: 8dBm
• Voltage - Supply: 2 V ~ 4 V
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA5x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

4.10.8
4.10.8.1
4.10.8.2
44
Atmel ATA5771/73/74
Register Description
MCUCR – MCU Control Register
PRR – Power Reduction Register
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Register (DIDR0). See
Section 4.20.10.5 “DIDR0 – Digital Input Disable Register 0” on page 158
The MCU Control Register contains control bits for power management.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the pro-
grammer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one just before
the execution of the SLEEP instruction and to clear it immediately after waking up.
• Bits 4, 3 – SM1..0: Sleep Mode Select Bits 2..0
These bits select between the three available sleep modes as shown in
Table 4-14.
Note:
• Bit 2 – Res: Reserved Bit
This bit is a reserved bit in the Atmel
• Bits 7, 6, 5, 4- Res: Reserved Bits
These bits are reserved bits in the ATtiny44V and will always read as zero.
• Bit 3- PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the
Timer/Counter1 is enabled, operation will continue like before the shutdown.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
SM1
1. Only recommended with external crystal or resonator selected as clock source
0
0
1
1
Sleep Mode Select
CC
R
R
7
–
0
7
–
0
/2 on an input pin can cause significant current even in active mode. Digital
PUD
R/W
SM0
R
6
0
6
–
0
0
1
0
1
R/W
SE
R
5
–
0
5
0
®
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Standby
ATtiny44V and will always read as zero.
SM1
R/W
R
4
–
0
4
0
(1)
PRTIM1
SM0
R/W
R/W
3
0
3
0
PRTIM0
R/W
—
R
2
0
2
0
ISC01
PRUSI
R/W
R/W
1
0
1
0
Table
for details.
ISC00
PRADC
R/W
4-14.
R/W
0
0
0
0
9137E–RKE–12/10
MCUCR
PRR