XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 10
XRT75R03IVTR-F
Manufacturer Part Number
XRT75R03IVTR-F
Description
IC LIU E3/DS3/STS-1 3CH 128LQFP
Manufacturer
Exar Corporation
Datasheet
1.XRT75R03IVTR.pdf
(92 pages)
Specifications of XRT75R03IVTR-F
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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XRT75R03
REV. 1.0.8
SYSTEM-SIDE TRANSMIT INPUT AND TRANSMIT CONTROL PINS
P
127
40
22
67
IN
#
S
IGNAL
TxClkINV/
DMO_0
DMO_1
DMO_2
SClk
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
N
AME
T
YPE
O
I
Drive Monitor Output - Channel 0:
Drive Monitor Output - Channel 1:
Drive Monitor Output - Channel 2:
These output signals are used to indicate some sort of fault condition within
the Transmit Output signal path.
This output pin will toggle "High" anytime the Transmit Drive Monitor cir-
cuitry either, via the corresponding MTIP and MRING input pins or inter-
nally, detects no bipolar pulses via the Transmit Output line signal (e.g., via
the TTIP_n and TRING_n output pins) for 128 bit-periods.
This output pin will be driven "Low" anytime the Transmit Drive Monitor cir-
cuitry has detected at least one bipolar pulse via the Transmit Output line
signal within the last 128 bit periods.
Hardware Mode: Transmit Clock Invert
Host Mode: Serial Clock Input:
Hardware mode
This input pin is used to select the edge of the TxCLK_n input that the
Transmit Section of all channels will use to sample the TPDATA_n and
TNDATA_n input pins.
Setting this input pin “High” configures all three Transmitters to sample the
TPData_n and TNData_n data on the rising edge of the TxClk_n .
Setting this input pin “Low” configures all three Transmitters to sample the
TPData_n and TNData_n data on the falling edge of the TxClk_n .
Host Mode
In the Host Mode this pin functions as SClk input pin please refer to the pin
descriptions for the Microprocessor interface.
7
D
ESCRIPTION
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