XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 25

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XRT75R03IVTR-F

Manufacturer Part Number
XRT75R03IVTR-F
Description
IC LIU E3/DS3/STS-1 3CH 128LQFP
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R03IVTR-F

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT75R03IVTR-F
Manufacturer:
Exar Corporation
Quantity:
10 000
POWER SUPPLY AND GROUND PINS
xr
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
xr
xr
Microprocessor Serial INTERFACE - (HOST MODE)
P
101
67
66
71
IN
P
77
93
86
IN
#
#
SClk/TCLKINV
INT/LOSMUT
S
CS/RCLKINV
RxAVDD_0
RxAVDD_1
RxAVDD_2
IGNAL
RESET
P
IN
N
AME
N
AME
T
YPE
O
I
I
I
T
****
YPE
Microprocessor Serial Interface -Serial Clock Input:
This input pin functions as the Clock Source for the Microprocessor Serial Inter-
face.
Each time the user wishes to perform a READ or WRITE operate with the on-
chip Command Registers via the Microprocessor Serial Interface, the user
MUST do the following.
The Microprocessor Serial Interface will sample any data residing upon the SDI
input pin, upon the rising edge of this clock signal. Further, for READ opera-
tions, the Microprocessor Serial Interface will serially output the contents of a
target Command Register upon the falling edge of this clock signal.
N
Microprocessor Serial Interface - Chip Select Input:
This input pin should be pulled "Low" whenever a READ or WRITE operation is
to be executed to the on-chip Command Registers, via the Microprocessor
Serial Interface.
This input pin should remain "Low" until the READ or WRITE operation has
been completed. This input pin should be pulled "High" at all other times.
N
Microprocessor Serial Interface - Interrupt Request Output:
If the XRT75R03 has been configured to operate in the Host Mode, then this pin
becomes the Interrupt Request Output for the XRT75R03.
During normal conditions, this output pin will be pulled "High". However, if the
user enables certain interrupts within the device, and if those conditions occur,
then the XRT75R03 will request an interrupt from the Microprocessor by tog-
gling this output pin "Low".
N
Microprocessor Serial Interface - H/W RESET Input:
Pulsing this input "Low" causes the XRT75R03 to reset the contents of the on-
chip Command Registers to their default values. As a consequence, the
XRT75R03 will then also be operating in its default condition.
For normal operation pull this input pin to a logic "High".
N
OTE
OTE
OTES
OTE
Assert the CS input pin by toggling it "Low", and
Provide 16 Clock Periods to this particular input pin for each READ and
WRITE operation.
1. If the XRT75R03 device is configured to operate in the Hardware
2. This pin will remain "Low" until the Interrupt has been served.
: The maximum frequency of this particular clock signal is 10MHz.
: If the XRT75R03 has been configured to operate in the Host Mode then
: This input pin is internally pulled high.
:
R
this input pin will function as the RCLKINV input pin.
Mode, then this pin functions as the LOSMUT input pin.
ECEIVE
A
22
NALOG
VDD
D
ESCRIPTION
D
ESCRIPTION
XRT75R03
REV. 1.0.8

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