XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 47

• Manufacturer Part Number: XRT75R03IVTR-F
• Description: IC LIU E3/DS3/STS-1 3CH 128LQFP
• Manufacturer: Exar Corporation

Specifications of XRT75R03IVTR-F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
signal to reduce Inter-Symbol Interference (ISI) so that the slicer slices the signal at 50% of peak voltage to
generate Positive and Negative data.
The Equalizer can either be “IN” or “OUT” by setting the REQEN_n pin “High” or “Low” (in Hardware Mode) or
setting the REQEN_n control bit to “1” or “0” (in Host Mode).
The Equalizer has two gain settings to provide optimum equalization. In the case of normally shaped DS3/
STS-1 pulses (pulses that meet the template requirements) that has been driven through 0 to 900 feet of cable,
the Equalizer can be left “IN” by setting the REQEN_n pin to “High” (in Hardware Mode) or setting the
REQEN_n control bit to “1” (in Host Mode).
However, for square-shaped pulses such as E3 or for DS3/STS-1 high pulses (that does not meet the pulse
template requirements), it is recommended that the Equalizer be left “OUT” for cable length less than 300 feet
by setting the REQEN_n pin “Low” (in Hardware Mode) or by setting the REQEN_n control bit to “0” (in Host
Mode).This would help to prevent over-equalization of the signal and thus optimize the performance in terms of
better jitter transfer characteristics.
N
The Equalizer also contain an additional 20 dB gain stage to provide the line monitoring capability of the
resistively attenuated signals which may have 20dB flat loss. This capability can be turned on by writing a “1” to
the RxMON_n bits in the control register or by setting the RxMON pin (pin 69) “High”. However, asserting or
enabling RxMON suppresses the internal LOS circuitry and LOS will never assert nor LOS be declared when
operating with RxMON enabled.
For E3 mode, ITU-T G.703 Recommendation specifies that the receiver be able to recover error-free clock and
data in the presence of a sinusoidal interfering tone signal. For DS3 and STS-1 modes, the same
recommendation is being used. Figure 17 shows the configuration to test the interference margin for DS3/
STS1. Figure 18 shows the set up for E3.
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F
Recommendations for Equalizer Settings:
6.1.1
OTE
IGURE
:
STS-1 = 25.92 MHz
Pattern Generator
DS3 = 22.368 MHz
regardless of the cable length, the integrity of the E3 signal was restored properly over 0 to 12 dB cable loss at
Industrial Temperature.
2
18. I
Sine Wave
The results of extensive testing indicates that even when the Equalizer was left “IN” (REQEN_n = “HIGH”),
Generator
23
Interference Tolerance:
-1 PRBS
NTERFERENCE
N
S
M
ARGIN
T
EST
Attenuator
S
ET UP FOR
DS3/STS-1
44
∑
Cable Simulator
(XRT75R03)
DUT
Equipment
XRT75R03
Test
REV. 1.0.8