XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 64

• Manufacturer Part Number: XRT75R03IVTR-F
• Description: IC LIU E3/DS3/STS-1 3CH 128LQFP
• Manufacturer: Exar Corporation

Specifications of XRT75R03IVTR-F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT75R03
REV. 1.0.8
N
UMBER
7 - 3
B
B
2
1
0
R/O
IT
IT
0
7
T
ABLE
Interrupt Enable
Interrupt Enable
Interrupt Enable
Channel 2
Channel 1
Channel 0
19: B
Unused
N
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
B
R/O
AME
IT
0
LOCK
6
L
EVEL
Reserved
B
T
R/O
R/W
R/W
R/W
R/O
IT
YPE
0
I
NTERRUPT
5
D
V
EFAULT
ALUE
0
0
0
0
E
B
R/O
NABLE
IT
0
4
Channel 2 Interrupt Enable Bit:
This READ/WRITE bit-field is used to do either of the following
•
•
If the user enables Channel 2-related Interrupts at the Block
Level, then this means that a given Channel 2-related interrupt
(e.g., Change in LOS Defect Condition - Channel 2) will be
enabled if the user has also enabled this particular interrupt at
the Source Level.
If the user disables Channel 2-related Interrupts at the Block
Level, then this means that the XRT75R03 will NOT generate
any Channel 2-Related Interrupts at all.
0 - Disables all Channel 2-related Interrupt.
1 - Enables Channel 2-related Interrupts at the Block Level. The
user must still enable individual Channel 2-related Interrupts at
the source level, before they are enabled for interrupt generation.
Channel 1 Interrupt Enable Bit:
Please see the description for Bit 2 Channel 2 Interrupt Enable.
Channel 0 Interrupt Enable Bit:
Please see the description for Bit 2 Channel 2 Interrupt Enable.
To enable Channel 2 for Interrupt Generation at the Block
Level
To disable all Interrupts associated with Channel 2 within the
XRT75R03
R
61
EGISTER
B
R/O
IT
0
3
- CR32 (A
Channel 2
Interrupt
Enable
B
R/W
DDRESS
D
IT
0
ESCRIPTION
2
L
OCATION
Channel 1
Interrupt
Enable
B
R/W
IT
0
1
xr
xr
xr
xr
= 0
X
20)
Channel 0
Interrupt
Enable
B
R/W
IT
0
0