XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 71

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XRT75R03IVTR-F

Manufacturer Part Number
XRT75R03IVTR-F
Description
IC LIU E3/DS3/STS-1 3CH 128LQFP
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R03IVTR-F

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT75R03IVTR-F
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
xr
xr
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
B
IT
B
R/O
7 - 4
N
IT
0
UMBER
3
2
7
T
ABLE
Change of FL Con-
25: S
dition Interrupt Sta-
Condition Interrupt
B
R/O
Change of LOL
IT
0
6
Unused
OURCE
Status
Unused
N
tus
AME
L
B
R/O
EVEL
IT
0
5
I
NTERRUPT
RUR
RUR
T
R/O
YPE
B
R/O
IT
0
4
S
TATUS
D
Interrupt Status
V
EFAULT
Change of FL
ALUE
0
0
0
Condition
Ch_n
R
B
RUR
68
IT
EGISTER
0
3
Change of FL (FIFO Limit Alarm) Condition Interrupt
Status - Ch 0:
This RESET-upon-READ bit-field indicates whether or not
the Change of FL Condition Interrupt (for Channel 0) has
occurred since the last read of this register.
0 - Indicates that the Change of FL Condition Interrupt has
NOT occurred since the last read of this register.
1 - Indicates that the Change of FL Condition Interrupt has
occurred since the last read of this register.
N
Change of Receive LOL (Loss of Lock) Condition Inter-
rupt Status - Ch 0:
This RESET-upon-READ bit-field indicates whether or not
the Change of Receive LOL Condition Interrupt (for Chan-
nel 0) has occurred since the last read of this register.
0 - Indicates that the Change of Receive LOL Condition
Interrupt has NOT occurred since the last read of this reg-
ister.
1 - Indicates that the Change of Receive LOL Condition
Interrupt has occurred since the last read of this register.
N
OTE
OTE
Channel 1 Address Location = 0x0A
Channel 2 Address Location = 0x12
: The user can determine the current state of the
: The user can determine the current state of the
- C
Change of LOL
Interrupt Status
FIFO Alarm condition by reading out the contents
of Bit 3 (FL Alarm Declared) within the Alarm
Status Register.
Receive LOL Defect condition by reading out the
contents of Bit 2 (Receive LOL Defect Declared)
within the Alarm Status Register.
HANNEL
Condition
Ch_n
B
RUR
IT
0
2
0 A
DDRESS
D
ESCRIPTION
Change of LOS
nterrupt Status
Condition
Ch_n
B
RUR
L
IT
0
OCATION
1
Change of DMO
Interrupt Status
= 0
Condition
XRT75R03
X
Ch_n
B
RUR
02
REV. 1.0.8
IT
0
0

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