XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 15

• Manufacturer Part Number: XRT75R03IVTR-F
• Description: IC LIU E3/DS3/STS-1 3CH 128LQFP
• Manufacturer: Exar Corporation

Specifications of XRT75R03IVTR-F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
xr
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
xr
xr
P
71
99
IN
#
S
IGNAL
LOSMUT/
LOSTHR
INT
N
AME
T
I/O
YPE
I
Muting Upon LOS Enable/Interrupt Output Pin
This input pin is used to configure the Receive Section, in each of the three
channels within the chip, to automatically pull their corresponding Recovered
Data Output pins (e.g. RPOS_n and RNEG_n) to GND anytime and for the
duration that the Receive Section declares the LOS defect condition. In other
words, this feature if enabled will cause the Receive Channel to automatically
mute the Recovered data anytime and for the duration that the Receive Section
declares the LOS defect condition.
"Low" - Disables the Muting upon LOS feature. In this setting the Receive Sec-
tion will NOT automatically mute the Recovered Data whenever it is declaring
the LOS defect condition.
"High" - Enables the Muting upon LOS feature. In this setting the Receive Sec-
tion will automatically mute the Recovered Data whenever it is declaring the
LOS defect condition.
N
Analog LOS Detector Threshold Level Select Input:
This input pin permits the user to select both of the following parameters for the
Analog LOS Detector within each of the three Receive Sections within the
XRT75R03 device.
Setting this input pin "High" selects one set of Analog LOS Defect Declaration
and Clearance thresholds. Setting this input pin "Low" selects the other set of
Analog LOS Defect Declaration and Clearance thresholds.
Please see Table 10 for more details.
N
OTES
OTE
1. The Analog LOS Defect Declaration Threshold (e.g., the maximum signal
2. The Analog LOS Defect Clearance Threshold (e.g., the minimum signal
1. This input pin is will function as the Interrupt Request output pin within
2. This configuration setting applies globally to each of the three (3)
: This input pin is only active if at least one channel within the XRT75R03
level that the Receive Section of a given channel must detect before
declaring the LOS Defect condition), and
level that the Receive Section of a given channel must detect before
clearing the LOS Defect condition)
:
has been configured to operate in the DS3 or STS-1 Modes.
the Microprocessor Serial Interface, if the XRT75R03 has been
configured to operate in the Host Mode.
channels within the XRT75R03.
12
D
ESCRIPTION
XRT75R03
REV. 1.0.8