XR17V352IB-0A-EVB Exar Corporation, XR17V352IB-0A-EVB Datasheet - Page 50

• Manufacturer Part Number: XR17V352IB-0A-EVB
• Description: EVAL BOARD FOR XR17V352 113BGA
• Manufacturer: Exar Corporation

Specifications of XR17V352IB-0A-EVB

• Main Purpose: Interface, UART
• Embedded: -
• Utilized Ic / Part: XR17V352
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

XR17V352
HIGH PERFORMANCE DUAL PCI EXPRESS UART
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit [3] set to a logic 1, LCR bit [4] selects the even or odd parity format.
•
•
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
•
•
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
The MCR register is used for controlling the modem interface signals or general purpose inputs/outputs.
4.8
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even the number of logic 1’s in the transmitted character.
The receiver must be programmed to check the same format.
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
Modem Control Register (MCR) - Read/Write
LCR BIT [5]
Table 16
X
0
0
1
1
above for parity selection summary.
BIT [1]
BIT [2]
LCR BIT [4]
0
0
1
1
0
1
1
T
X
0
1
0
1
ABLE
BIT [0]
LENGTH
5,6,7,8
16: P
W
6,7,8
0
1
0
1
ORD
5
LCR BIT [3]
ARITY
0
1
1
1
1
50
P
ROGRAMMING
S
W
TOP BIT LENGTH
(B
ORD LENGTH
5 (default)
1 (default)
IT TIME
Forced parity to space, “0”
1-1/2
Force parity to mark, “1”
6
7
8
2
P
(
ARITY SELECTION
S
Even parity
))
Odd parity
No parity
REV. 1.0.1