S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 101

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
1
2.3.40
2.3.41
This register configures the re-routing of SCI1 and SPI0 on alternative ports.
Freescale Semiconductor
Address 0x0256
Address 0x0257
Routing
WOMM
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write: Anytime.
Option
Field
Reset
Reset
7-0
W
W
R
R
MODRR7
Port M wired-or mode—Enable open-drain functionality on output pin
This bit configures an output pin as wired-or (open-drain) or push-pull independent of the function used on the pins.
In wired-or mode a logic “0” is driven active low while a logic “1” remains undriven. This allows a multipoint
connection of several serial modules. The bit has no influence on pins used as input.
1 Output buffer operates as open-drain output.
0 Output buffer operates as push-pull output.
WOMM7
Port M Wired-Or Mode Register (WOMM)
Module Routing Register (MODRR)
SCI1
0
0
7
7
= Unimplemented or Reserved
MODRR6
WOMM6
SCI1
0
0
6
6
Figure 2-38. Port M Wired-Or Mode Register (WOMM)
MODRRx
7
Figure 2-39. Module Routing Register (MODRR)
Table 2-36. WOMM Register Field Descriptions
6
S12XS Family Reference Manual, Rev. 1.11
WOMM5
—
0
0
0
5
5
Table 2-37. SCI1 Routing
TXD
MODRR4
WOMM4
SPI0
0
0
4
4
Related Pins
Description
WOMM3
—
3
0
3
0
0
RXD
WOMM2
—
0
0
0
Port Integration Module (S12XSPIMV1)
2
2
WOMM1
Access: User read/write
Access: User read/write
—
0
0
0
1
1
WOMM0
—
0
0
0
0
0
101
1
1