S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 120

IC MCU 16BIT 128KB FLSH 112LQFP

S9S12XS128J1MAL

Manufacturer Part Number
S9S12XS128J1MAL
Description
IC MCU 16BIT 128KB FLSH 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS128J1MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12XS128J1MAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
1
Port Integration Module (S12XSPIMV1)
2.3.73
2.3.74
2.4
2.4.1
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output or input of a peripheral module.
120
PER1AD0
Address 0x0277
Address 0x0278-0x27F
Read: Anytime.
Write: Anytime.
Read: Always reads 0x00
Write: Unimplemented
Field
Reset
Reset
7-0
W
W
R
R
PER1AD07
Functional Description
Port AD0 pull device enable—Enable pull-up device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Port AD0 Pull Up Enable Register 1 (PER1AD0)
PIM Reserved Registers
General
0
0
0
7
7
= Unimplemented or Reserved
PER1AD06
Figure 2-71. Port AD0 Pull Up Enable Register 1 (PER1AD0)
0
0
0
6
6
Table 2-70. PER1AD0 Register Field Descriptions
PER1AD05
S12XS Family Reference Manual, Rev. 1.11
Figure 2-72. PIM Reserved Registers
0
0
0
5
5
PER1AD04
0
0
0
4
4
Description
u = Unaffected by reset
PER1AD03
3
0
3
0
0
PER1AD02
0
0
0
2
2
PER1AD01
Freescale Semiconductor
Access: User read/write
0
0
0
1
1
Access: User read
PER1AD00
0
0
0
0
0
1
1

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