S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 65

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.3.1
Table 2-2
Freescale Semiconductor
Port
A
B
E
A
B
E
K
E
K
Offset or
Address
0x000C
0x000D
0x001C
0x001D
0x000A
0x000B
0x000E
0x001B
0x001E
0x001F
0x023F
0x0000
0x0001
0x0002
0x0003
0x0004
0x0007
0x0008
0x0009
0x0020
0x0031
0x0032
0x0033
0x0034
:
:
:
:
:
shows the register map of the Port Integration Module.
Memory Map
PORTA—Port A Data Register
PORTB—Port B Data Register
DDRA—Port A Data Direction Register
DDRB—Port B Data Direction Register
PIM Reserved
PORTE—Port E Data Register
DDRE—Port E Data Direction Register
Non-PIM address range
PUCR—Pull-up Control Register
RDRIV—Reduced Drive Register
Non-PIM address range
ECLKCTL—ECLK Control Register
PIM Reserved
IRQCR—IRQ Control Register
PIM Reserved
Non-PIM address range
PORTK—Port K Data Register
DDRK—Port K Data Direction Register
Non-PIM address range
S12XS Family Reference Manual, Rev. 1.11
2
2
2
2
Table 2-2. Block Memory Map
Register
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Port Integration Module (S12XSPIMV1)
-
-
-
-
1
1
1
1
1
1
0b
3
100_0000
0xD0
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x40
0x00
0x00
0x00
-
-
-
-
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2.3.11/2-80
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