A2F200M3F-1FGG256 Actel, A2F200M3F-1FGG256 Datasheet - Page 19
![FPGA - Field Programmable Gate Array 200K System Gates SmartFusion](/photos/16/14/161496/lpsilverchip_sml.jpg)
A2F200M3F-1FGG256
Manufacturer Part Number
A2F200M3F-1FGG256
Description
FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
Manufacturer
Actel
Datasheet
1.A2F500M3G-FGG256.pdf
(192 pages)
Specifications of A2F200M3F-1FGG256
Processor Series
A2F200
Core
ARM Cortex M3
Number Of Logic Blocks
8
Maximum Operating Frequency
120 MHz
Number Of Programmable I/os
117
Data Ram Size
4608 bit
Delay Time
200 ns
Supply Voltage (max)
3.6 V
Supply Current
3 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
200000
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A2F200M3F-1FGG256
Manufacturer:
ACT
Quantity:
36
Company:
Part Number:
A2F200M3F-1FGG256
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A2F200M3F-1FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Thermal Characteristics
Introduction
The temperature variable in the SoC Products Group Designer software refers to the junction
temperature, not the ambient, case, or board temperatures. This is an important distinction because
dynamic and static power consumption will cause the chip's junction temperature to be higher than the
ambient, case, or board temperatures.
resistance, temperature gradient, and power.
where
Table 2-6 • Package Thermal Resistance
θ
θ
θ
T
T
T
T
P
Product
A2F200M3F-FG256
A2F200M3F-FG484
JA
JB
JC
A
J
B
C
= Junction-to-air thermal resistance
= Junction-to-board thermal resistance
= Junction-to-case thermal resistance
= Junction temperature
= Ambient temperature
= Board temperature (measured 1.0 mm away from the
= Case temperature
= Total power dissipated by the device
package edge)
X = 4.0; Y = 5.6
X = 5.10; Y = 7.3
Die Size
(mm)
EQ 1
R e v i s i o n 6
θ
θ
33.7
21.8
θ
Still Air
JB
JC
JA
through
=
=
=
T
------------------ -
T
------------------ -
T
----------------- -
J
J
J
P
–
P
–
P
–
30.0
18.2
1.0 m/s
θ
T
T
EQ 3
A
B
C
θ
JA
SmartFusion Intelligent Mixed Signal FPGAs
give the relationship between thermal
28.3
16.7
2.5 m/s
9.3
7.7
θ
JC
24.8
16.8
θ
JB
Units
°C/W
°C/W
EQ 1
EQ 2
EQ 3
2 -7
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