PCF2127AT/1,518 NXP Semiconductors, PCF2127AT/1,518 Datasheet - Page 51
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PCF2127AT/1,518
Manufacturer Part Number
PCF2127AT/1,518
Description
IC RTC/CALENDAR TCXO QTZ 20SOIC
Manufacturer
NXP Semiconductors
Type
Clock/Calendar/Alarmr
Datasheet
1.PCF2127AT1518.pdf
(80 pages)
Specifications of PCF2127AT/1,518
Package / Case
20-SOIC (0.300", 7.50mm Width)
Time Format
HH:MM:SS (12/24 hr)
Memory Size
512B
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 4.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Function
Serial Clock, Timestamp, Timekeeper, Watchdog, Alarm, Calendar, Timer, Timer Interrupt
Rtc Memory Size
512 bytes
Supply Voltage (max)
4.2 V
Supply Voltage (min)
1.8 V
Mounting Style
SMD/SMT
Rtc Bus Interface
I2C
Supply Current
2600 nA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
PCF2127A_2
Product data sheet
8.14 External clock test mode
A test mode is available which allows on-board testing. In this mode it is possible to set up
test conditions and control the operation of the RTC.
The test mode is entered by setting bit EXT_TEST logic 1 (register Control_1). Then
pin CLKOUT becomes an input. The test mode replaces the internal clock signal (64 Hz)
with the signal applied to pin CLKOUT. Every 64 positive edges applied to pin CLKOUT
generate an increment of one second.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a
maximum period of 1000 ns. The internal clock, now sourced from CLKOUT, is divided
down by a 2
be set into a known state by using bit STOP. When bit STOP is logic 1, the prescaler is
reset to 0. STOP must be cleared before the prescaler can operate again.
From a stop condition, the first 1 second increment will take place after 32 positive edges
on pin CLKOUT. Thereafter, every 64 positive edges will cause a 1 second increment.
Remark: Entry into test mode is not synchronized to the internal 64 Hz clock. When
entering the test mode, no assumption as to the state of the prescaler can be made.
Operating example:
Repeat 7 and 8 for additional increments.
1. Set EXT_TEST test mode (register Control_1, EXT_TEST is logic 1).
2. Set bit STOP (register Control_1, STOP is logic 1).
3. Set time registers to desired value.
4. Clear STOP (register Control_1, STOP is logic 0).
5. Apply 32 clock pulses to CLKOUT.
6. Read time registers to see the first change.
7. Apply 64 clock pulses to CLKOUT.
8. Read time registers to see the second change.
6
divider chain called prescaler (see prescaler in
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 7 May 2010
Integrated RTC, TCXO and quartz crystal
Table
55). The prescaler can
PCF2127A
© NXP B.V. 2010. All rights reserved.
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