PCF2127AT/1,518 NXP Semiconductors, PCF2127AT/1,518 Datasheet - Page 9

• Manufacturer Part Number: PCF2127AT/1,518
• Description: IC RTC/CALENDAR TCXO QTZ 20SOIC
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2127AT/1,518

• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Time Format: HH:MM:SS (12/24 hr)
• Memory Size: 512B
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 4.2 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Serial Clock, Timestamp, Timekeeper, Watchdog, Alarm, Calendar, Timer, Timer Interrupt
• Rtc Memory Size: 512 bytes
• Supply Voltage (max): 4.2 V
• Supply Voltage (min): 1.8 V
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C
• Supply Current: 2600 nA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PCF2127A_2
Product data sheet
8.2.1 Register Control_1
8.2 Control registers
PCF2127A has 30 8-bit registers. The first 3 registers with the addresses 00h, 01h, and
02h are used as control registers.
Table 5.
[1]
[2]
Bit
7
6
5
4
3
2
1
0
Default value.
When writing to the register this bit has always to be set logic 0.
Symbol
EXT_TEST
T
STOP
TSF1
POR_OVRD
12_24
MI
SI
Control_1 - control and status register 1 (address 00h) bit description
All information provided in this document is subject to legal disclaimers.
Value
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 02 — 7 May 2010
[1]
[2]
[1]
[1]
[1]
[1]
[1]
[1]
Description
normal mode
external clock test mode
unused
RTC source clock runs
RTC clock is stopped;
no timestamp interrupt generated
flag set when TS input is driven to an
intermediate level between power supply
and ground;
Power-On Reset Override (PORO) facility
disabled;
PORO enabled
24 hour mode selected
12 hour mode selected
minute interrupt disabled
minute interrupt enabled
second interrupt disabled
second interrupt enabled
RTC divider chain flip-flops are
asynchronously set logic 0;
CLKOUT at 32.768 kHz, 16.384 kHz, or
8.192 kHz is still available
flag must be cleared to clear interrupt
set logic 0 for normal operation
Integrated RTC, TCXO and quartz crystal
PCF2127A
© NXP B.V. 2010. All rights reserved.
Reference
Section 8.14
-
Section 8.15
Section 8.12.1
Section 8.8.2
Table 22
Section 8.13
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