IS43R16160B-6TL INTEGRATED SILICON SOLUTION (ISSI), IS43R16160B-6TL Datasheet - Page 24

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IS43R16160B-6TL

Manufacturer Part Number
IS43R16160B-6TL
Description
SDRAM, DDR, 16M X 16, 2.5V, 66TSOP2
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS43R16160B-6TL

Access Time
0.7ns
Page Size
256Mbit
Memory Case Style
TSOP-2
No. Of Pins
66
Operating Temperature Range
0°C To +70°C
Memory Type
DRAM - Synchronous
Memory Configuration
4 BLK (4M X 16)
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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IS43R83200B
IS43R16160B, IC43R16160B
24
DDR SDRAM (Rev.1.1)
I
I
OPERATIONAL DESCRIPTION
BANK ACTIVATE
the bank addresses (BA0,1). A row is indicated by the row address A0-12. The minimum activation
interval between one bank and the other bank is tRRD.
PRECHARGE
precharge all command (PREA,PRE+A10=H) is available to deactivate them at the same time. After
tRP from the precharge, an ACT command to the same bank can be issued.
The DDR SDRAM has four independent banks. Each bank is activated by the ACT command with
The PRE command deactivates the bank indicated by BA0,1. When multiple banks are active, the
Command
A0-9,11,12
A precharge command can be issued at BL/2 from a read command without data loss.
BA0,1
/CLK
DQS
CLK
A10
DQ
Preliminary
Preliminary
2 ACT command / tRCmin
ACT
Xa
Xa
00
tRRD
Bank Activation and Precharge All (BL=8, CL=2)
tRCD
ACT
01
Xb
Xb
READ
Y
0
00
tRCmin
256M Double Data Rate Synchronous DRAM
BL/2
tRAS
Qa0
Qa1
Qa2
Precharge all
Qa3
PRE
1
Qa4
Zentel Electronics Corporation
Qa5
tRP
Qa6
A3S56D30/40ETP
Integrated Silicon Solution, Inc.
Qa7
ACT
Xb
Xb
01
10/31/08
Rev. B

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